Skip to content

Correct GPIO config for SDRAM GPIO pins at higher SDCLK speeds

d9d0fa8
Select commit
Loading
Failed to load commit list.
Sign in for the full log view
Merged

Correct speed for SDRAM GPIO pins at higher SDCLK speeds #471

Correct GPIO config for SDRAM GPIO pins at higher SDCLK speeds
d9d0fa8
Select commit
Loading
Failed to load commit list.

Annotations

1 warning and 1 notice
Build and test on Windows
succeeded May 7, 2026 in 35m 6s