WORKAROUND: arm64: dts: qcom: enable ethernet on the QPS615 switch for RB3Gen2, Lemans EVK, and Monaco EVK #335
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| // SPDX-License-Identifier: BSD-3-Clause | ||
| /* | ||
| * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. | ||
| */ | ||
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| #include <dt-bindings/interrupt-controller/irq.h> | ||
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| ð0_pci { | ||
| pinctrl-names = "default"; | ||
| pinctrl-0 = <&aqr_intn_wol_sig>; | ||
| phy-rst-som-gpios = <&tlmm 76 GPIO_ACTIVE_HIGH>; | ||
| interrupts-extended = <&tlmm 56 IRQ_TYPE_EDGE_FALLING>; | ||
| interrupt-names = "wol_irq"; | ||
| qcom,always-on-supply; | ||
| qcom,phy-rst-delay-us = <221000>; | ||
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| qcom,iommu-group = <ð0_pci_iommu_group>; | ||
| eth0_pci_iommu_group: eth0_pci_iommu_group { | ||
| qcom,iommu-dma = "atomic"; | ||
| }; | ||
| }; | ||
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| ð1_pci { | ||
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| pinctrl-names = "default"; | ||
| pinctrl-0 = <&napa_intn_wol_sig>; | ||
| phy-rst-som-gpios = <&tlmm 77 GPIO_ACTIVE_HIGH>; | ||
| interrupts-extended = <&tlmm 57 IRQ_TYPE_EDGE_FALLING>; | ||
| interrupt-names = "wol_irq"; | ||
| qcom,always-on-supply; | ||
| qcom,phy-rst-delay-us = <20000>; | ||
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| qcom,iommu-group = <ð1_pci_iommu_group>; | ||
| eth1_pci_iommu_group: eth1_pci_iommu_group { | ||
| qcom,iommu-dma = "atomic"; | ||
| }; | ||
| }; | ||
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| &tlmm { | ||
| qps615_intn_wol { | ||
| aqr_intn_wol_sig: aqr-intn-wol-sig { | ||
| pins = "gpio56"; | ||
| function = "gpio"; | ||
| input-enable; | ||
| bias-disable; | ||
| }; | ||
| napa_intn_wol_sig: napa-intn-wol-sig { | ||
| pins = "gpio57"; | ||
| function = "gpio"; | ||
| input-enable; | ||
| bias-disable; | ||
| }; | ||
| }; | ||
| }; | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,54 @@ | ||
| // SPDX-License-Identifier: BSD-3-Clause | ||
| /* | ||
| * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. | ||
| */ | ||
|
|
||
| #include <dt-bindings/interrupt-controller/irq.h> | ||
|
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| ð0_pci { | ||
|
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| pinctrl-names = "default"; | ||
| pinctrl-0 = <&aqr_intn_wol_sig>; | ||
| phy-rst-som-gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>; | ||
| interrupts-extended = <&tlmm 40 IRQ_TYPE_EDGE_FALLING>; | ||
| interrupt-names = "wol_irq"; | ||
| qcom,always-on-supply; | ||
| qcom,phy-rst-delay-us = <221000>; | ||
|
|
||
| qcom,iommu-group = <ð0_pci_iommu_group>; | ||
| eth0_pci_iommu_group: eth0_pci_iommu_group { | ||
| qcom,iommu-dma = "atomic"; | ||
| }; | ||
| }; | ||
|
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| ð1_pci { | ||
|
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| pinctrl-names = "default"; | ||
| pinctrl-0 = <&napa_intn_wol_sig>; | ||
| phy-rst-som-gpios = <&expander5 0 GPIO_ACTIVE_HIGH>; | ||
| interrupts-extended = <&tlmm 39 IRQ_TYPE_EDGE_FALLING>; | ||
| interrupt-names = "wol_irq"; | ||
| qcom,always-on-supply; | ||
| qcom,phy-rst-delay-us = <20000>; | ||
|
|
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| qcom,iommu-group = <ð1_pci_iommu_group>; | ||
| eth1_pci_iommu_group: eth1_pci_iommu_group { | ||
| qcom,iommu-dma = "atomic"; | ||
| }; | ||
| }; | ||
|
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| &tlmm { | ||
| qps615_intn_wol { | ||
| aqr_intn_wol_sig: aqr-intn-wol-sig { | ||
| pins = "gpio40"; | ||
| function = "gpio"; | ||
| input-enable; | ||
| bias-disable; | ||
| }; | ||
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| napa_intn_wol_sig: napa-intn-wol-sig { | ||
| pins = "gpio39"; | ||
| function = "gpio"; | ||
| input-enable; | ||
| bias-disable; | ||
| }; | ||
| }; | ||
| }; | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,84 @@ | ||
| // SPDX-License-Identifier: BSD-3-Clause | ||
| /* | ||
| * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. | ||
| */ | ||
|
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| / { | ||
| qep_vreg: qep_vreg { | ||
| compatible = "regulator-fixed"; | ||
| regulator-name = "qep_vreg"; | ||
| gpio = <&pm7325_gpios 8 0>; | ||
| regulator-min-microvolt = <1800000>; | ||
| regulator-max-microvolt = <1800000>; | ||
| enable-active-high; | ||
| }; | ||
|
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| aqr_vreg: aqr_vreg { | ||
| compatible = "regulator-fixed"; | ||
| regulator-name = "aqr_vreg"; | ||
| gpio = <&pm7250b_gpios 4 0>; | ||
| regulator-min-microvolt = <1800000>; | ||
| regulator-max-microvolt = <1800000>; | ||
| enable-active-high; | ||
| }; | ||
| }; | ||
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| ð0_pci { | ||
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| pinctrl-names = "default"; | ||
| pinctrl-0 = <&aqr_intn_wol_sig>; | ||
| qcom,phy-rst-gpio-id = <0>; | ||
| interrupts-extended = <&tlmm 141 IRQ_TYPE_EDGE_FALLING>; | ||
| interrupt-names = "wol_irq"; | ||
| phy-supply = <&aqr_vreg>; | ||
| qcom,phy-rst-delay-us = <221000>; | ||
|
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| qcom,iommu-group = <ð0_pci_iommu_group>; | ||
| eth0_pci_iommu_group: eth0_pci_iommu_group { | ||
| qcom,iommu-dma = "atomic"; | ||
| }; | ||
| }; | ||
|
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| ð1_pci { | ||
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| pinctrl-names = "default"; | ||
| pinctrl-0 = <&napa_intn_wol_sig>; | ||
| qcom,phy-rst-gpio-id = <1>; | ||
| interrupts-extended = <&tlmm 101 IRQ_TYPE_EDGE_FALLING>; | ||
| interrupt-names = "wol_irq"; | ||
| phy-supply = <&qep_vreg>; | ||
| qcom,phy-rst-delay-us = <20000>; | ||
|
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| qcom,iommu-group = <ð1_pci_iommu_group>; | ||
| eth1_pci_iommu_group: eth1_pci_iommu_group { | ||
| qcom,iommu-dma = "atomic"; | ||
| }; | ||
| }; | ||
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| &tlmm { | ||
| qps615_intn_wol { | ||
| aqr_intn_wol_sig: aqr_intn_wol_sig { | ||
| mux { | ||
| pins = "gpio141"; | ||
| function = "gpio"; | ||
| }; | ||
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| config { | ||
| pins = "gpio141"; | ||
| input-enable; | ||
| bias-disable; | ||
| }; | ||
| }; | ||
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| napa_intn_wol_sig: napa_intn_wol_sig { | ||
| mux { | ||
| pins = "gpio101"; | ||
| function = "gpio"; | ||
| }; | ||
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| config { | ||
| pins = "gpio101"; | ||
| input-enable; | ||
| bias-disable; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
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I think you use node name directly and avoid adding labelling