Support for NXP T1040 RDB

Makefile

@@ -269,6 +269,9 @@ endif
 ifeq ($(TARGET),nxp_t1024)
     MAIN_TARGET:=factory_wstage1.bin
 endif
+ifeq ($(TARGET),nxp_t1040)
+    MAIN_TARGET:=factory_wstage1.bin
+endif
 
 ifeq ($(TARGET),sama5d3)
     MAIN_TARGET:=wolfboot.bin test-app/image_v1_signed.bin

arch.mk

@@ -691,7 +691,7 @@ ifeq ($(ARCH),PPC)
   # Target-specific CPU flags
   ifeq ($(TARGET),nxp_t2080)
     CFLAGS+=-mcpu=e6500 -mno-altivec -mbss-plt
-  else ifeq ($(TARGET),nxp_t1024)
+  else ifneq ($(filter nxp_t1024 nxp_t1040,$(TARGET)),)
     CFLAGS+=-mcpu=e5500
   endif
 
@@ -1030,8 +1030,8 @@ ifeq ($(ARCH),ARM_BE)
   endif
 endif
 
-ifeq ($(TARGET),nxp_t1024)
-  # Power PC big endian
+ifneq ($(filter nxp_t1024 nxp_t1040,$(TARGET)),)
+  # Power PC big endian (e5500 core, T1024 2-core / T1040 4-core)
   ARCH_FLAGS=-mhard-float -mcpu=e5500
   CFLAGS+=$(ARCH_FLAGS)
   BIG_ENDIAN=1

config/examples/nxp-t1040.config

@@ -0,0 +1,67 @@
+# NXP QorIQ T1040 (4 core)
+
+ARCH=PPC
+TARGET=nxp_t1040
+SIGN?=ECC384
+HASH?=SHA384
+IMAGE_HEADER_SIZE?=512
+DEBUG?=0
+DEBUG_UART?=1
+VTOR?=1
+CORTEX_M0?=0
+NO_ASM?=0
+EXT_FLASH?=0
+SPI_FLASH?=0
+NO_XIP?=0
+UART_FLASH?=0
+ALLOW_DOWNGRADE?=0
+NVM_FLASH_WRITEONCE?=0
+WOLFBOOT_VERSION?=0
+NO_MPU?=0
+SPMATH?=0
+SPMATHALL?=1
+RAM_CODE?=0
+DUALBANK_SWAP?=0
+WOLFTPM?=0
+ELF?=1
+DEBUG_ELF=0
+
+# NOR Base Address (128MB NOR at 0xE8000000 - 0xEFFFFFFF)
+ARCH_FLASH_OFFSET?=0xE8000000
+
+# Flash Sector Size (128KB)
+WOLFBOOT_SECTOR_SIZE=0x20000
+
+# wolfBoot start address (same as T1024 - NOR top is 0xEFFFFFFF)
+WOLFBOOT_ORIGIN=0xEFF40000
+# wolfBoot partition size (custom)
+BOOTLOADER_PARTITION_SIZE=0xC0000
+
+# Application Partition Size (15MB)
+WOLFBOOT_PARTITION_SIZE?=0xF00000
+# Location in Flash for Application Partition
+WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xEE000000
+# Load Partition to RAM Address
+WOLFBOOT_LOAD_ADDRESS?=0x70000000
+
+# Location in Flash for Update Partition
+WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0xEEF00000
+
+# Location of temporary sector used during updates
+WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xE80F0000
+
+# Stage 1 loader settings (16KB)
+WOLFBOOT_STAGE1_SIZE=0x4000
+# Location in Flash for stage 1 loader (XIP from boot ROM)
+WOLFBOOT_STAGE1_FLASH_ADDR=0xEFFFC000
+# Address in RAM to load wolfBoot (end of DDR at 2GB-1MB for 32-bit addressing)
+WOLFBOOT_STAGE1_LOAD_ADDR=0x7FF00000
+
+# DTS (Device Tree)
+WOLFBOOT_DTS_BOOT_ADDRESS?=0xE8800000
+WOLFBOOT_DTS_UPDATE_ADDRESS?=0xE8820000
+# DTS Load to RAM Address
+WOLFBOOT_LOAD_DTS_ADDRESS?=0x7F100000
+
+# Load to RAM before hash and verify
+CFLAGS_EXTRA+=-DWOLFBOOT_USE_RAMBOOT