Adding Custom RR Graph Builder to OpenFPGA #3325
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amin1377
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AlexandreSinger,
AmirhosseinPoolad and
soheilshahrouz
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@vaughnbetz: If you can review the documentation I wrote for CRR (Link) and let me know whether it’s clear, I would really appreciate it. |
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In this PR, a new custom RR Graph generator for tileable RR Graphs is introduced. With this generator, users can define their desired switch block patterns in CSV files (one CSV file per unique pattern) and specify, in a YAML switch-block map file, which pattern should be applied at each tile location. When generating the RR Graph, instead of relying on the switch block definitions in the architecture file, the CRR generator reads these CSV templates and constructs the connections accordingly.
This work was done on top of the work that was started by @ganeshgore, @ql-mahdi, and @saaramahmoudi.