An example of using Ramulator as memory model in a cycle-accurate SystemC Design
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Updated
Jun 30, 2017 - C++
An example of using Ramulator as memory model in a cycle-accurate SystemC Design
This repository integrates gem5 with Ramulator2, allowing gem5 to use Ramulator2 as its DRAM memory model. With the provided materials and configuration, you can run simulations in gem5 backed by the detailed timing and behavior modeling of Ramulator2.
Public artifact for "Different Perspectives of Memory System Simulation". This repository contains the final corrected simulator source code, benchmarks, experiment configurations, and scripts to reproduce the paper's results on CPU-memory simulator interface correctness.
A simple trace visualizer for Ramulator 2.0
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