Designed and simulated all fundamental and universal CMOS logic gates (NOT, AND, OR, NAND, NOR, XOR, XNOR) using the Electric VLSI Design Tool. This project includes schematic design, DRC-clean layouts, ALS simulation, and waveform analysis.

Contains basic Simulation circuit layout for concepts involved in Electronic Devices and Circuits and Integrated Circuits Subjects

This repository contains all the experiments which I have done on LTSpice software for the VLSI Design course.

This repository contains the design, simulation, and analysis of a CMOS Inverter using industry-standard tools like Cadence Virtuoso. The project focuses on understanding and optimizing the fundamental building block of digital circuits—the CMOS inverter.

This project demonstrates the complete design, layout, simulation, and verification of a **CMOS Inverter** using the **Electric VLSI Design Tool**.

CMOS INVERTER DESIGN AND LAYOUT USING CADENCE VIRTUOSO

Characterised a standard inverter and adding to the openlane flow

2 Week SoC DIgital VLSI Workshop

A simple CMOS Inverter implemented on AMD Vivado & Cadence Virtuoso tool

CMOS inverter designed in Magic VLSI using SCMOS technology, extracted into a SPICE netlist, and simulated in ngspice. Includes layout, extraction files, and a simulation wrapper with transient analysis and waveform outputs

This project is a part of the report for my 7th semester program elective (EC-4142 Analog-VLSI).