Initial support for STM32H743/H745 CPUs

[digitalentity]

This PR adds base support for the STM32H7 series, specifically targeting STM32H743 and STM32H745.

1. Runtime & System Setup

• Clock Tree: Implements clock configuration in runtime_stm32h7.go.
  • HSE (8MHz) as source.
  • PLL1 configured for 400MHz SYSCLK.
  • PLL2 configured for 80MHz ADC kernel clock.
  • HSI48 enabled for USB and RNG.
• MPU & Cache: Introduced runtime_stm32h7_mpu.go to manage the Memory Protection Unit.
  • Enables L1 Instruction and Data Caches.
  • Configures memory regions (Flash: Write-Through, AXI SRAM: Write-Back) for better performance.
• Linker & Target: Added targets/stm32h7.ld and targets/stm32h743.json.

2. Peripheral Support

• ADC: Added 16-bit ADC support with calibration and H7-specific channel mapping.
• Window Watchdog (WWDG): Added a new WindowWatchdog API specifically for H7, providing protection against runaway code.
• USB: Initial support for USB OTG FS (Full Speed) with CDC/Serial integration.
• GPIO/EXTI: Integration with existing STM32 GPIO and external interrupt logic.

3. Examples

• src/examples/wwdg: A new cross-platform example demonstrating the Window Watchdog.
• src/examples/pwm/nucleo-h743zi.go: Pin mapping for PWM on the Nucleo-H743 board.

Disclaimer: A significant amount of this PR is incrementally generated via Gemini with Claude as a first reviewer + human supervision and review afterwards.