Register interrupt controller for RV32

[ytakano]

1. Implement InterruptController trait for RV64.

awkernel/awkernel_lib/src/interrupt.rs

Lines 24 to 66 in 1679d1d

	pub trait InterruptController: Sync + Send {
	fn enable_irq(&mut self, irq: u16);
	fn disable_irq(&mut self, irq: u16);
	fn pending_irqs(&self) -> Box<dyn Iterator<Item = u16>>;
	/// Send an inter-process interrupt to `target` CPU.
	fn send_ipi(&mut self, irq: u16, cpu_id: u32);
	/// Send an inter-process interrupt to all CPUs.
	fn send_ipi_broadcast(&mut self, irq: u16);
	/// Send an inter-process interrupt to all CPUs except the sender CPU.
	fn send_ipi_broadcast_without_self(&mut self, irq: u16);
	/// Initialization for non-primary core.
	fn init_non_primary(&mut self) {}
	/// End of interrupt.
	/// This will be used by only x86_64.
	fn eoi(&mut self) {}
	/// Return the range of IRQs, which can be registered.
	/// The range is [start, end).
	fn irq_range(&self) -> (u16, u16);
	/// Return the range of IRQs, which can be used for PnP devices.
	/// The range is [start, end).
	fn irq_range_for_pnp(&self) -> (u16, u16);
	/// Set the PCIe MSI or MSI-X interrupt
	#[allow(unused_variables)]
	fn set_pcie_msi(
	&self,
	segment_number: usize,
	target: u32,
	irq: u16,
	message_data: &mut u32,
	message_address: &mut u32,
	message_address_upper: Option<&mut u32>,
	) -> Result<IRQ, &'static str> {
	Err("Interrupt controller does not support PCIe MSI or MSI-X.")
	}
	}

2. Register the interrupt controller.

awkernel/awkernel_lib/src/interrupt.rs

Line 101 in 1679d1d

pub unsafe fn register_interrupt_controller(controller: Box<dyn InterruptController>) {