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@macchian macchian commented Nov 5, 2025

This topology adds aggregated mode support for:
cs42l43 codec on sound link 3 with internal speaker, cs35l56 left and right amplifiers on soundwire link 2,
and with SDW_DMIC or PCH_DMIC support.

@macchian macchian requested a review from bardliao November 5, 2025 10:53
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macchian commented Nov 5, 2025

@bardliao , do we need to create sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg for non-quirk support ?

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bardliao commented Nov 6, 2025

@bardliao , do we need to create sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg for non-quirk support ?

IMHO, we just create what we need right now and will create sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg when we need it. Because the BT part might be different between sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg and sof-ptl-cs42l43-agg-l3-cs35l56-l2-4ch.tplg

@macchian macchian force-pushed the dev-cs42l43-cs35l56 branch from 57bb2e5 to 29695fe Compare November 11, 2025 04:12
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lgirdwood commented Nov 11, 2025

@bardliao , do we need to create sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg for non-quirk support ?

IMHO, we just create what we need right now and will create sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg when we need it. Because the BT part might be different between sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg and sof-ptl-cs42l43-agg-l3-cs35l56-l2-4ch.tplg

If its just BT that is different, then we should be fine to upstream as this would enable all other endpoints with this general config whilst BT updates are in flow ? (or would other endpoints still work using existing topologies) ?

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@bardliao , do we need to create sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg for non-quirk support ?

IMHO, we just create what we need right now and will create sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg when we need it. Because the BT part might be different between sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg and sof-ptl-cs42l43-agg-l3-cs35l56-l2-4ch.tplg

If its just BT that is different, then we should be fine to upstream as this would enable all other endpoints with this general config whilst BT updates are in flow ? (or would other endpoints still work using existing topologies) ?

@lgirdwood The update will only apply to ACE4.0 and above. PTL topology will not have the '-bt' suffix.

@macchian macchian force-pushed the dev-cs42l43-cs35l56 branch 2 times, most recently from f6cab4f to 237288b Compare November 13, 2025 08:52
@macchian macchian marked this pull request as ready for review November 13, 2025 08:58
@macchian macchian changed the title Topology2: Add sof-ptl-cs42l43-agg-l3-cs35l56-l2-4ch support Topology2: Add sof-ptl-cs42l43-agg-l3-cs35l56-l2/-4ch support Nov 13, 2025
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@bardliao good for you now ?

"cavs-sdw\;sof-ptl-cs42l43-agg-l3-cs35l56-l2\;PLATFORM=ptl,SDW_DMIC=1,NUM_SDW_AMP_LINKS=2,\
SDW_AMP_FEEDBACK=false,SDW_SPK_STREAM=Playback-SmartAmp,SDW_DMIC_STREAM=Capture-SmartMic,\
SDW_JACK_OUT_STREAM=Playback-SimpleJack,SDW_JACK_IN_STREAM=Capture-SimpleJack,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-cs42l43-agg-l3-cs35l56-l2-4ch.bin,\
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nhlt is not necessary if the topology doesn't support PCH DMIC

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yes, I should remove it.

SDW_AMP_FEEDBACK=false,SDW_SPK_STREAM=Playback-SmartAmp,SDW_DMIC_STREAM=Capture-SmartMic,\
SDW_JACK_OUT_STREAM=Playback-SimpleJack,SDW_JACK_IN_STREAM=Capture-SimpleJack,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-cs42l43-agg-l3-cs35l56-l2-4ch.bin,\
HDMI1_ID=7,HDMI2_ID=8,HDMI3_ID=9,DEEPBUFFER_FW_DMA_MS=10,DEEP_BUF_SPK=true,\
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Are the HDMI IDs correct? I would expect that the BE IDs are jack playback: 0, jack capture: 1, speaker playback 2, sdw dmic: 4, and the HDMI BEs will start with 5.

BT_PCM_ID=20,BT_ID=10,BT_PCM_NAME=Bluetooth,ADD_BT=true"

"cavs-sdw\;sof-ptl-cs42l43-agg-l3-cs35l56-l2-4ch\;PLATFORM=ptl,NUM_SDW_AMP_LINKS=2,NUM_DMICS=4,\
PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,DMIC0_ID=5,DMIC1_ID=6,HDMI1_ID=7,HDMI2_ID=8,HDMI3_ID=9,\
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If there is no SDW DMIC, the last SDW BE link will be speaker playback: 2, I think the DMIC BE ID will start with 3?

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Without Disco table support, the Cirrus cs42l43 multi-endpoints create the SOC_SDW_CODEC_MIC DAI by quirk.
As a result, SDW_BE_ID 4 remains reserved, and consequently PCH DMIC_BE_ID starts from 5 afterward.

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But in the no Disco table support case, shouldn't we disable the SDW MIC by quirk if the PCH DMIC is used?

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@bardliao , you are right. I modified the PCH_DMIC_BE_ID and SDW_DMIC separately.

These topologies add aggregated mode support for:
  cs42l43 codec on sound link 3 with internal speaker,
  cs35l56 left and right amplifiers on soundwire link 2,
  and add SSP2-BT support.

sof-ptl-cs42l43-agg-l3-cs35l56-l2 uses SDW_DMIC.
sof-ptl-cs42l43-agg-l3-cs35l56-l2-4ch uses PCH_DMIC.

Set SDW_SPK_ENHANCED_PLAYBACK=false to disable high pass filter on
cs35l56 speaker.

Signed-off-by: Mac Chiang <mac.chiang@intel.com>
@macchian macchian force-pushed the dev-cs42l43-cs35l56 branch from 237288b to cda274a Compare December 3, 2025 11:12
@macchian macchian requested a review from bardliao December 3, 2025 11:28
@lgirdwood lgirdwood merged commit 99ea36f into thesofproject:main Dec 3, 2025
38 of 42 checks passed
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3 participants