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Temporary fix for multi core DP component memory problems #10031

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Temporary fix for multi core DP component memory problems #10031

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d754018
Topology2: Add nocodec DP core 1 test topologies for MTL, LNL, and PTL
May 14, 2025
9e0e57c
kconfig: Make VIRTUAL_HEAP default n for ACE to fix multi core DP
May 26, 2025
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4 changes: 4 additions & 0 deletions tools/topology/topology2/cavs-nocodec.conf
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Original file line number Diff line number Diff line change
Expand Up @@ -95,6 +95,8 @@ Define {
DMIC0_PCM_0_NAME "DMIC SFX1"
DMIC0_PCM_1_NAME "DMIC SFX2"
SRC_DOMAIN "default"
# Keep DP_SRC_CORE_ID == SSP2_PCM_CORE_ID, no nested define resolvation ATM
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@lgirdwood lgirdwood May 26, 2025

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ok, so is this a test topology that reproduces the issue ?

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@jsarha jsarha May 26, 2025

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Yes. The same commit exists in the DP multi core test PR: #10009

DP_SRC_CORE_ID 2
}

# override defaults with platform-specific config
Expand Down Expand Up @@ -248,6 +250,7 @@ IncludeByKey.PASSTHROUGH {
}
Object.Widget.src.1 {
scheduler_domain "$SRC_DOMAIN"
core_id $DP_SRC_CORE_ID
}
Object.Widget.pipeline.1 {
core $SSP2_PCM_CORE_ID
Expand Down Expand Up @@ -808,6 +811,7 @@ IncludeByKey.PASSTHROUGH {
index 11
rate_in 48000
scheduler_domain "$SRC_DOMAIN"
core_id $DP_SRC_CORE_ID

<include/components/src_format_s32_convert_from_48k.conf>
}
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10 changes: 10 additions & 0 deletions tools/topology/topology2/development/tplg-targets.cmake
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Expand Up @@ -309,6 +309,16 @@ PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN=DP"
"cavs-nocodec\;sof-ptl-nocodec-dp-test\;PLATFORM=ptl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN=DP"

# SSP test topology for Data Processing on core 1 SRC for MTL
"cavs-nocodec\;sof-mtl-nocodec-dp-core-test\;PLATFORM=mtl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin,SRC_DOMAIN=DP,DP_SRC_CORE_ID=1"
# SSP test topology for Data Processing on core 1 SRC for LNL
"cavs-nocodec\;sof-lnl-nocodec-dp-core-test\;PLATFORM=lnl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN=DP,DP_SRC_CORE_ID=1"
# SSP test topology for Data Processing on core 1 SRC for PTL
"cavs-nocodec\;sof-ptl-nocodec-dp-core-test\;PLATFORM=ptl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN=DP,DP_SRC_CORE_ID=1"

# Add MFCC to 16 kHz DMIC1, 2ch with NHLT - cAVS
"sof-hda-generic\;sof-hda-generic-cavs25-2ch-mfcc\;HDA_CONFIG=mix,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-hda-generic-cavs25-2ch-mfcc.bin,\
Expand Down
1 change: 0 additions & 1 deletion zephyr/Kconfig
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Expand Up @@ -94,7 +94,6 @@ config SOF_ZEPHYR_NO_SOF_CLOCK

config VIRTUAL_HEAP
bool "Use virtual memory heap to allocate a buffers"
default y if ACE
default n
depends on ACE
help
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