riscv: promote d, e, and f target_features to CfgStableToggleUnstable#156188
Open
romancardenas wants to merge 2 commits intorust-lang:mainfrom
Open
riscv: promote d, e, and f target_features to CfgStableToggleUnstable#156188romancardenas wants to merge 2 commits intorust-lang:mainfrom
romancardenas wants to merge 2 commits intorust-lang:mainfrom
Conversation
Collaborator
|
|
4 tasks
This comment has been minimized.
This comment has been minimized.
RalfJung
reviewed
May 5, 2026
Member
There was a problem hiding this comment.
Please add tests which show that we properly error/warn when using #[target_feature(enable = "f")] or -Ctarget-feature=f.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
This PR is a continuation of #155962
It uses the new
CfgStableToggleUnstablestability level for the"d","e", and"f"target_featuresof RISC-V. This way, it will be possible to add conditional code blocks depending on whether the target architecture has FPU, for instance.The PR is related to #150257
r? @RalfJung