Only call reloc when reloc_len is non-zero

.gitignore

@@ -24,3 +24,5 @@ dcetestdec
 *.mak
 *.xem3
 ducati/ti/dce/package
+/ducati/ti/dce/baseimage/package/
+/ducati/ti/dce/lib/

dce.h

@@ -41,6 +41,7 @@
 void * dce_alloc(int sz);
 void dce_free(void *ptr);
 void dce_set_fd(int fd);
+int dce_get_fd();
 
 /* avoid some messy stuff in xdc/std.h which pisses of gcc.. */
 #define xdc__ARGTOPTR
@@ -50,6 +51,7 @@ void dce_set_fd(int fd);
 struct omap_device * dce_init(void);
 void dce_deinit(struct omap_device *dev);
 #define XDM_MEMTYPE_BO 10
+#define XDM_MEMTYPE_BO_OFFSET 11
 #endif
 
 #endif /* __DCE_H__ */

ducati/config.bld

@@ -68,11 +68,28 @@ var M3 = xdc.useModule('ti.targets.arm.elf.M3');
 M3.rootDir = arm_cgtools_rootdir;
 M3.ccOpts.suffix += " -ms -pds=71";
 M3.lnkOpts.prefix += " --retain=.resource_table";
-/* Set default platform and list of all interested platforms for M3 */
-M3.platforms = [
-                  "ti.platform.omap4430.core0",
-                  "ti.platform.omap4430.core1",
-               ];
+
+/* Default platforms for M3 in non-SMP mode */
+var regPlatforms = [
+                    "ti.platform.omap4430.core0",
+                    "ti.platform.omap4430.core1",
+                    "ti.platform.omap54xx.core0",
+                    "ti.platform.omap54xx.core1",
+                    ];
+
+/* Default platforms for M3 in SMP mode */
+var smpPlatforms = [
+                    "ti.platform.omap4430.ipu",
+                    "ti.platform.omap54xx.ipu",
+                    ];
+
+
+if (java.lang.System.getenv("FOR_SMP") == '1') {
+    M3.platforms = smpPlatforms;
+} else {
+    M3.platforms = regPlatforms;
+}
+
 M3.platform = M3.platforms[0];
 
 /* Uncomment the required targets */
@@ -81,3 +98,13 @@ Build.targets = [
                     M3,
                 ];
 
+
+
+/* Eliminate profiles that aren't 'debug' or 'release' */
+for (var t = 0; t < Build.targets.length; t++) {
+    for (prof in Build.targets[t].profiles) {
+        if ((prof != "debug") && (prof != "release")) {
+            delete Build.targets[t].profiles[prof];
+        }
+    }
+}

ducati/ti/dce/baseimage/dce_ipu.cfg

@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2011, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+xdc.loadCapsule("ti/configs/omap4430/IpcCommon.cfg.xs");
+xdc.includeFile("ti/configs/omap4430/DucatiSmp.cfg");
+xdc.includeFile("ti/configs/omap4430/DucatiAmmu.cfg");
+
+var Program			= xdc.useModule('xdc.cfg.Program');
+var Memory			= xdc.useModule('xdc.runtime.Memory');
+var HeapMem			= xdc.useModule('ti.sysbios.heaps.HeapMem');
+var GateHwi			= xdc.useModule('ti.sysbios.gates.GateHwi');
+
+
+Program.global.enableSMP = true;
+HeapMem.common$.gate = GateHwi.create();
+
+var heapMemParams			= new HeapMem.Params;
+heapMemParams.size			= 0x19FFFF0;  // TODO check this size, maybe we can go up?
+heapMemParams.sectionName	= ".systemHeap";
+var heap0					= HeapMem.create(heapMemParams);
+Memory.defaultHeapInstance	= heap0;
+Program.global.heap0		= heap0;
+
+/* 
+ * Setup memory map.
+ */
+
+Program.sectMap[".systemHeap"]	= "EXT_HEAP";
+
+/* Work-around for .const loading issues with MPEG4/VC1 codecs.. move AMMU
+ * tables out of .const into .txt so that they have valid data when AMMU
+ * is programmed (which happens before cinit initializes rw sections..
+ * which is what .const becomes due to rw var mistakenly placed on .const
+ */
+Program.sectMap[".const:ti_sysbios_hal_ammu_AMMU_mmuInitConfig__C"] = "EXT_CODE";
+Program.sectMap[".const:ti_sysbios_hal_ammu_AMMU_numLargePages__C"] = "EXT_CODE";
+Program.sectMap[".const:ti_sysbios_hal_ammu_AMMU_numLinePages__C"] = "EXT_CODE";
+Program.sectMap[".const:ti_sysbios_hal_ammu_AMMU_numMediumPages__C"] = "EXT_CODE";
+Program.sectMap[".const:ti_sysbios_hal_ammu_AMMU_numSmallPages__C"] = "EXT_CODE";
+
+/*
+ *  ======== CODEC ENGINE configurations  ========
+ */
+
+var Global = xdc.useModule('ti.sdo.ce.osal.Global'); 
+Global.runtimeEnv = Global.DSPBIOS;
+
+xdc.useModule('ti.sdo.ce.global.Settings').profile    = "debug";
+xdc.loadPackage('ti.sdo.ce.video').profile            = "debug";
+xdc.loadPackage('ti.sdo.ce.video3').profile           = "debug";
+xdc.loadPackage('ti.sdo.ce.alg').profile              = "debug";
+xdc.useModule('ti.sdo.fc.global.Settings').profile    = "debug";
+xdc.loadPackage('ti.sdo.fc.rman').profile             = "debug";
+xdc.loadPackage('ti.sdo.fc.ires.hdvicp').profile      = "debug";
+xdc.loadPackage('ti.sdo.fc.ires.tiledmemory').profile = "debug";
+
+var ipcSettings = xdc.useModule('ti.sdo.ce.ipc.Settings');
+ipcSettings.ipc = xdc.useModule('ti.sdo.ce.ipc.bios.Ipc');
+// set to true to enable debugging of codec engine
+xdc.useModule('ti.sdo.ce.Settings').checked         = true;
+
+/* Enable Memory Translation module that operates on the BIOS Resource Table */
+var IpcMemory = xdc.useModule('ti.resources.IpcMemory');
+
+
+
+//set All heaps of dskts as the default heap0
+var DSKT2           = xdc.useModule('ti.sdo.fc.dskt2.DSKT2');
+DSKT2.DARAM0    = "heap0";
+DSKT2.DARAM1    = "heap0";
+DSKT2.DARAM2    = "heap0";
+DSKT2.SARAM0    = "heap0";
+DSKT2.SARAM1    = "heap0";
+DSKT2.SARAM2    = "heap0";
+DSKT2.ESDATA    = "heap0";
+DSKT2.IPROG     = "heap0";
+DSKT2.EPROG     = "heap0";
+DSKT2.DSKT2_HEAP     = "heap0";
+
+var HDVICP2                      = xdc.useModule('ti.sdo.fc.ires.hdvicp.HDVICP2');
+HDVICP2.memoryBaseAddress[0]     = 0xBB000000;
+HDVICP2.registerBaseAddress[0]   = 0xBA000000;
+HDVICP2.resetControlAddress[0]   = 0xAA306F10;
+HDVICP2.resetFxn                 = "ivahd_reset";
+
+xdc.useModule('ti.sdo.fc.rman.RMAN');
+
+// Load HDVICP2 support lib end decoder/encoder APIs:
+var HDVICP20API = xdc.useModule('ti.sdo.codecs.hdvicp20api.HDVICP20API');
+var VIDDEC3 = xdc.useModule('ti.sdo.ce.video3.IVIDDEC3');
+var VIDENC2 = xdc.useModule('ti.sdo.ce.video2.IVIDENC2');
+
+// load whatever codecs are available in the build
+var codecs = [];
+
+function loadCodec(pkg, name)
+{
+	try {
+		var codec = xdc.useModule(pkg);
+		print('loading: ' + name);
+		codecs.push({ name: name, mod: codec, local: true });
+	} catch(e) {
+		print('no package: ' + pkg);
+	}
+}
+
+loadCodec('ti.sdo.codecs.h264dec.ce.H264DEC',    'ivahd_h264dec');
+loadCodec('ti.sdo.codecs.mpeg4dec.ce.MPEG4DEC',  'ivahd_mpeg4dec');
+loadCodec('ti.sdo.codecs.jpegvdec.ce.JPEGVDEC',  'ivahd_jpegvdec');
+loadCodec('ti.sdo.codecs.vc1vdec.ce.VC1VDEC',    'ivahd_vc1vdec');
+loadCodec('ti.sdo.codecs.mpeg2vdec.ce.MPEG2VDEC','ivahd_mpeg2vdec');
+loadCodec('ti.sdo.codecs.h264enc.ce.H264ENC',    'ivahd_h264enc');
+loadCodec('ti.sdo.codecs.mpeg4enc.ce.MPEG4ENC',  'ivahd_mpeg4enc');
+loadCodec('ti.sdo.codecs.jpegvenc.ce.JPEGVENC',  'ivahd_jpegvenc');
+
+var engine         = xdc.useModule('ti.sdo.ce.Engine');
+var myEngine       = engine.create("ivahd_vidsvr", codecs);
+
+xdc.useModule('ti.sysbios.knl.Task');

ducati/ti/dce/iresman_tiledmemory.c → ducati/ti/dce/baseimage/iresman_tiledmemory.c

@@ -44,7 +44,7 @@
 #include <ti/sdo/fc/ires/iresman.h>
 #include <ti/sdo/fc/ires/tiledmemory/ires_tiledmemory.h>
 
-#include "dce_priv.h"
+#include <ti/dce/dce_priv.h>
 
 
 static IRESMAN_PersistentAllocFxn * allocFxn;   /* Memory alloc function */

ducati/ti/dce/main.c → ducati/ti/dce/baseimage/main.c

@@ -47,14 +47,8 @@
 #include <string.h>
 #include <stdlib.h>
 
-#include "dce_priv.h"
-
-
-/* include resource table in core0/sysm3 build, but with a sane data size */
-#define DATA_SIZE 0x02000000  /* 32MiB */
-typedef unsigned int u32;
-#include <ti/resources/rsc_table.h>
-
+/* Legacy function to allow Linux side rpmsg sample tests to work: */
+extern void start_ping_tasks();
 
 int main(int argc, char **argv)
 {
@@ -63,22 +57,13 @@ int main(int argc, char **argv)
     /* Set up interprocessor notifications */
     System_printf("%s starting..\n", MultiProc_getName(MultiProc_self()));
 
-    System_printf("%d resources at 0x%x\n",
-                  sizeof(resources) / sizeof(struct resource), resources);
-
-    /* Plug vring interrupts, and spin until host handshake complete. */
-    VirtQueue_startup();
-
     hostId = MultiProc_getId("HOST");
     MessageQCopy_init(hostId);
 
-    dce_init();
-
-    DEBUG("Completed IPC setup and Server Bringup");
+    /* Some background ping testing tasks, used by rpmsg samples: */
+    start_ping_tasks();
 
     BIOS_start();
 
-    DEBUG("Completed BIOS Bringup");
-
     return 0;
 }

ducati/ti/dce/baseimage/package.bld

@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2011, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ *  ======== package.bld ========
+ */
+
+var testBld = xdc.loadCapsule("ti/sdo/ipc/build/test.bld");
+var commonBld = xdc.loadCapsule("ti/sdo/ipc/build/common.bld");
+
+/*
+ *  Export everything necessary to build this package with (almost) no
+ *  generated files.
+ */
+Pkg.attrs.exportAll = true;
+
+/*
+ *  ======== testArray ========
+ *
+ *  Example:
+ *    var testArray = [
+ *        {name: Test1},
+ *        {name: Test2, sources: ["Test"], config: "Test", refOutput: "Test", timeout: "15", buildTargets: ["C64", "C28_large"]}
+ *    ];
+ */
+
+var testArray = [
+    {name: 'ducati-m3-core0', sources: ["main", "ping_tasks", "iresman_tiledmemory"], config: "dce_core0", copts: "-D CORE0 --gcc", buildPlatforms: ["ti.platform.omap4430.core0"]},
+    {name: 'ducati-m3-ipu', sources: ["main", "ping_tasks", "iresman_tiledmemory"], config: "dce_ipu", copts: "-D IPU --gcc", buildPlatforms: ["ti.platform.omap4430.ipu"]},
+];
+
+arguments = ["profile=debug platform=all"];
+
+testBld.buildTests(testArray, arguments);

ducati/ti/dce/baseimage/package.xdc

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2011, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ *  ======== package.xdc ========
+ *
+ */
+requires ti.dce;
+
+
+/*!
+ *  ======== ti.dce.baseimage ========
+ */
+package ti.dce.baseimage [1,0,0,0] {
+}