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Refactor gxgdsc a8xx#1135

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jiezh-qualcomm:Refactor_GXGDSC_A8xx
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Refactor gxgdsc a8xx#1135
jiezh-qualcomm wants to merge 2 commits into
qualcomm-linux:tech/mm/gpufrom
jiezh-qualcomm:Refactor_GXGDSC_A8xx

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@jiezh-qualcomm jiezh-qualcomm commented May 13, 2026

https://lore.kernel.org/lkml/20260427-gfx-clk-fixes-v2-0-797e54b3d464@oss.qualcomm.com/

This series fixes two closely related issues around GX GDSC ownership and
rail control on A8x GPUs, where recent hardware changes and runtime PM
interactions violate GMU and IFPC(Inter Frame Power Collapse) architectural
expectations.

Patch overview:

  1. clk: qcom: gdsc: Add custom disable callback for GX GDSC

    • Prevents unintended GX GDSC disable outside recovery.
  2. clk: qcom: gxclkctl: Use custom disable callback for gx_gdsc

    • Applies the custom behavior to GXCLKCTL and fixes runtime PM warnings.
  3. clk: qcom: common: ensure runtime PM suspend completes on probe

    • Guarantees synchronous runtime suspend during probe.
  4. clk: qcom: gxclkctl: Remove GX/GMxC rail votes to align with IFPC

    • Eliminates unintended APPS RSC rail votes, restoring GMU ownership.
  5. drm/msm/a8xx: Make a8xx_recover IFPC safe

    • Makes the A8xx recovery path IFPC‑aware by checking GX power‑domain
      state before accessing GX MMIO, matching a6xx behavior.
  6. drm/msm/a6xx: Limit GXPD votes to recovery in A8x

    • Removes GXPD voting from normal GMU runtime PM and restricts it to
      recovery using the synced_poweroff mechanism.

Port back 5 and 6 to make this fix work. CLK PR: #1111

CRs-Fixed: 4534638

Similar to a6xx_recover(), check the GX power domain status before
accessing mmio in GX domain a8xx_recover().

Fixes: 288a932 ("drm/msm/adreno: Introduce A8x GPU Support")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260427-gfx-clk-fixes-v2-5-797e54b3d464@oss.qualcomm.com
In A8x GPUs, the GX GDSC is moved to a separate block called GXCLKCTL
which is under the GX power domain. Due to the way the support for this
block is implemented in its driver, pm_runtime votes result in a vote on
GX/GMxC/MxC rails from the APPS RSC. This is against the Adreno
architecture which require GMU to be the sole voter of these collapsible
rails on behalf of GPU, except during the GPU/GMU recovery.

To align with this architectural requirement and to realize the power
benefits of the IFPC feature, remove the GXPD votes during gmu resume
and suspend. And during the recovery sequence, enable/disable the GXPD
along with the 'synced_poweroff' genpd hint to force collapse this GDSC.

Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260427-gfx-clk-fixes-v2-6-797e54b3d464@oss.qualcomm.com
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Merge Check Failed: No CR Numbers Found

Error: No Change Request numbers were found.

Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests.

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Merge Check Failed: No CR Numbers Found

Error: No Change Request numbers were found.

Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests.

@qcomlnxci qcomlnxci requested review from a team and quic-rajeshk and removed request for a team May 13, 2026 07:57
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Merge Check Failed: No Component Found

Configuration Error: No component found for branch 'tech/mm/gpu'.

There is no component associated with the provided branch in Polaris. Please verify the branch configuration.

Branch: tech/mm/gpu

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