docs(changelog): cut v0.4.0 section

[avrabe]

Summary

Promotes the CHANGELOG [Unreleased] placeholder to [0.4.0] ahead of tagging v0.4.0.

Covers the v0.4 work:

• feat(riscv): i64 Phase 2 — mul, shifts, rotates, compares, clz/ctz/popcnt, sign-extends #128 — RV32 i64 Phase 2: 16 new ops (mul, shifts, rotates, 64-bit compares, clz/ctz/popcnt, sign-extends). div/rem deferred to Phase 3.
• feat(sbom): CycloneDX 1.5 build-SBOM emission (rivet #107) #129 — CycloneDX 1.5 build-SBOM emission (synth compile --sbom), the synth slice of rivet fix(opt): wasm_to_ir missing handler for i32.load/i32.store result vregs (#104) #107.
• Improve instruction selector: explicit WASM value stack tracking for deterministic register assignment #72 — closed (explicit value-stack tracking already on the production path).

Once this merges, the v0.4.0 tag is pushed against the merge commit, triggering the release pipeline (binaries + SHA256SUMS + SLSA provenance + cosign signatures).

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[codecov]

Codecov Report

✅ All modified and coverable lines are covered by tests.

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