Skip to content

Conversation

@ppy2
Copy link
Owner

@ppy2 ppy2 commented Nov 10, 2025

No description provided.

ppy2 and others added 6 commits November 8, 2025 14:43
Problem: Audio artifacts/distortion on 44.1 kHz sample rate family due to
MCLKOUT stuck at 12 MHz instead of following calibrated PLL frequencies.

Root cause: Clock multiplexer CLK_I2S0_8CH_TX was not being switched to
CLK_I2S0_8CH_TX_SRC parent at boot, remaining on default xin_osc0_half (12 MHz).

Solution:
- Add CLK_I2S0_8CH_TX to assigned-clocks with parent CLK_I2S0_8CH_TX_SRC
- Add I2S0_8CH_MCLKOUT to assigned-clocks with parent MCLK_I2S0_8CH_TX
- Add rockchip,no-fractional-divider property to prevent fractional divider selection
- Remove MCLKOUT management from driver (managed via device tree only)

Clock path now matches kernel 5.10 behavior:
PLL_GPLL → TX_SRC (calibrated) → CLK_TX → MCLK_TX → MCLKOUT

Verified working:
- 44.1 kHz → MCLKOUT = 45.158 MHz ✓
- 48 kHz → MCLKOUT = 49.152 MHz ✓
- 88.2/96/192 kHz all working correctly ✓

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude <noreply@anthropic.com>
Add assigned-clock-rates to external clock mode DTS configuration to ensure
CLK_I2S0_8CH_TX properly switches to i2s0_mclkin parent at boot.

Without this fix, CLK_I2S0_8CH_TX remains on default xin_osc0_half parent,
preventing external clock mode from working.

In external mode:
- External oscillators (22.579 MHz / 24.576 MHz) provide MCLK
- Driver switches between them via freq-domain-gpios based on sample rate
- CLK_I2S0_8CH_TX must use i2s0_mclkin as parent for this to work

Files updated:
- rv1106_ext-ipc.dtsi (MAX variant)
- rv1106_512_ext-ipc.dtsi (512MB variant)

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude <noreply@anthropic.com>
- Enable DWC3 controller by changing status from disabled to okay
- Fix USB2PHY driver to handle missing main IRQ gracefully
- Add support for PHY_MODE_USB_HOST_HS/FS/LS modes for kernel 6.1
- Fix fallthrough issue causing USB PHY to enter invalid mode
- Enhance USB2PHY tuning for better high-speed detection
- Improve signal integrity for USB devices on kernel 6.1

This fixes USB audio device detection and enumeration issues when
upgrading from kernel 5.10 to 6.1 on RV1106 platform.

🤖 Generated with [Claude Code](https://claude.ai/code)

Co-Authored-By: Claude <noreply@anthropic.com>
- Added USB2PHY driver fixes for proper IRQ handling
- Enhanced PHY mode support for USB_HOST_HS/FS/LS modes
- Fixed fallthrough bug in mode switching
- Added kernel 6.1 specific USB2PHY tuning parameters
- Resolved USB speed negotiation issues for audio devices

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude <noreply@anthropic.com>
- Eliminated ~200 lines of duplicated DSD/PCM switching code
- Created rockchip_i2s_tdm_handle_dsd_switch() unified function
- Removed temporary //+++ markers and fixed formatting
- Optimized debug logging (dev_info -> dev_dbg for non-critical messages)
- Preserved all functionality: PLL/EXT clocks, PCM/DSD, mute/automute, volume control
- Maintained DSD bit swap and physical pin swap capabilities
- Successfully compiled and tested without breaking changes

Code is now cleaner, more maintainable, and production-ready.

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude <noreply@anthropic.com>
Changes included:
1. Fixed PCM noise in EXT mode by preventing DSD routing from affecting PCM data
2. Updated I2S driver with extensive debugging and clock handling improvements
3. Modified kernel configuration and patches for proper audio support

Key fix: Modified rockchip_i2s_tdm_handle_dsd_switch() to apply DSD routing
only when DSD is being enabled, preventing PCM channel corruption in EXT mode.

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude <noreply@anthropic.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants