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Use amdgpu.tensor_load_to_lds instead of rocdl_d.tensor_load_to_lds #589

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Merged
tgymnich merged 7 commits into from
Jan 5, 2026
Merged

Use amdgpu.tensor_load_to_lds instead of rocdl_d.tensor_load_to_lds #589

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fd10abb
Use amdgpu.tensor_load_to_lds instead of rocdl_d.tensor_load_to_lds
tgymnich Dec 17, 2025
67db8c1
tests: rocdl to amdgpu
tgymnich Dec 18, 2025
d47082c
fix snake_case
tgymnich Dec 23, 2025
1a10db2
fix padding
tgymnich Dec 29, 2025
a623340
pre-commit
tgymnich Jan 5, 2026
b73f7b9
improve readabilty and allow for n-D shapes
tgymnich Jan 5, 2026
bbd8e24
run pre-commit
tgymnich Jan 5, 2026
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6 changes: 3 additions & 3 deletions lit_tests/kernel/wave/gemm.py
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Original file line number Diff line number Diff line change
Expand Up @@ -1419,7 +1419,7 @@ def test_gemm_four_stage_global_to_lds():

# Prologue
# Verify prologue stores to shared memory
# CHECK: rocdl.tensor.load.to.lds
# CHECK: amdgpu.tensor_load_to_lds

# CHECK: rocdl.s.wait.tensorcnt 0
# CHECK: rocdl.s.wait.dscnt 0
Expand All @@ -1431,7 +1431,7 @@ def test_gemm_four_stage_global_to_lds():
# CHECK: %[[LOAD_IDX2:.*]] = affine.apply #[[MAP_LOAD2:.*]]()[%thread_id_x]
# CHECK: vector.load %[[VIEW1]][%[[LOAD_IDX1]], %[[LOAD_IDX2]]]

# CHECK: rocdl.tensor.load.to.lds
# CHECK: amdgpu.tensor_load_to_lds

# Main Loop:
# Verify Pipelined Loop, iter_args should contain vector values from prologue
Expand All @@ -1452,7 +1452,7 @@ def test_gemm_four_stage_global_to_lds():
# CHECK: rocdl.s.barrier.signal id = -1
# CHECK: rocdl.s.barrier.wait id = -1

# CHECK: rocdl.tensor.load.to.lds
# CHECK: amdgpu.tensor_load_to_lds

# CHECK: scf.yield {{.*}}, %[[LVIEW2]], %[[LVIEW3]], %[[LVIEW0]], %[[LVIEW1]]

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35 changes: 9 additions & 26 deletions lit_tests/kernel/wave/mma.py
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Expand Up @@ -644,6 +644,8 @@ def mma(
# CHECK: func.func @mma

### global buffer is bound to %0, %1 and %2 : MK, NK, MN
# CHECK: %[[C0:.*]] = arith.constant 0 : index

# CHECK: %[[SUBSPAN0:.*]] = stream.binding.subspan
# CHECK: %[[SUBSPAN1:.*]] = stream.binding.subspan
# CHECK: %[[SUBSPAN2:.*]] = stream.binding.subspan
Expand All @@ -658,14 +660,8 @@ def mma(
# CHECK: %[[VIEW0:.*]] = memref.view %[[SMEM]][{{.*}}] : memref<4608xi8, #gpu.address_space<workgroup>> to memref<32x36xf16, #gpu.address_space<workgroup>>
# CHECK: %[[VIEW1:.*]] = memref.view %[[SMEM]][{{.*}}] : memref<4608xi8, #gpu.address_space<workgroup>> to memref<32x36xf16, #gpu.address_space<workgroup>>

### get global buffer pointer
# CHECK: %[[INT_PTR_0:.+]] = memref.extract_aligned_pointer_as_index

### get shared buffer pointer
# CHECK: %[[CAST_3:.*]] = memref.reinterpret_cast %[[VIEW1]]
# CHECK: %[[INT_PTR_1:.+]] = memref.extract_aligned_pointer_as_index %[[CAST_3]]

# CHECK: %[[D0:.*]] = vector.from_elements
### make DMA base
# CHECK: %[[DMA_BASE0:.+]] = amdgpu.make_dma_base {{.*}}, %[[VIEW1]][{{.*}}]

# Cluster mask generation
# CHECK: %[[COND0:.*]] = arith.cmpi eq, %{{.*}}, %{{.*}} : index
Expand All @@ -677,30 +673,17 @@ def mma(
# CHECK: %[[MASK3:.*]] = arith.select %[[COND1]], %{{.*}}, %[[MASK2]] : index
# CHECK: %[[MASK4:.*]] = arith.select %[[COND0]], %{{.*}}, %[[MASK3]] : index

### pack descriptors and invoke tensor load

# CHECK: %[[TENSOR_DESC_0:.*]] = vector.from_elements
# CHECK-NOT: rocdl.tensor.load.to.lds
# CHECK-NOT: rocdl.s.wait.tensorcnt
# CHECK-NOT: amdgpu.lds_barrier

### get shared buffer pointer
# CHECK: %[[CAST_4:.*]] = memref.reinterpret_cast %[[VIEW0]]
# CHECK: %[[INT_PTR_2:.+]] = memref.extract_aligned_pointer_as_index %[[CAST_4]]
# CHECK: %[[INT_PTR_2_CAST:.+]] = arith.index_cast %[[INT_PTR_2]] : index to i32
# CHECK: %[[INT_PTR_2_CAST_ADDED:.+]] = arith.addi %[[INT_PTR_2_CAST]], %{{.*}} : i32
# CHECK: %[[TENSOR_DESC_0:.*]] = amdgpu.make_dma_descriptor %[[DMA_BASE0:.+]] globalSize [%{{.*}}, 32] globalStride [32, 1] sharedSize [16, 32]

### pack descriptors and invoke tensor load
# CHECK: %[[D1:.*]] = vector.from_elements %{{.*}}, %[[INT_PTR_2_CAST_ADDED]], %{{.*}}, %{{.*}} : vector<4xi32>
# CHECK: %[[TENSOR_DESC_1:.*]] = vector.from_elements
# CHECK: %[[DMA_BASE1:.+]] = amdgpu.make_dma_base {{.*}}, %[[VIEW0]][{{.*}}]
# CHECK: %[[TENSOR_DESC_1:.*]] = amdgpu.make_dma_descriptor %[[DMA_BASE1:.+]] globalSize [%{{.*}}, 32] globalStride [32, 1] sharedSize [16, 32]

# Fused descriptors
# CHECK: %[[SELECTED:.*]] = arith.cmpi eq, %{{.*}}, %[[C0]] : index
# CHECK: %[[D_FUSED:.*]] = arith.select %[[SELECTED]], %[[D0]], %[[D1]] : vector<4xi32>
# CHECK: %[[DESC_FUSED:.*]] = arith.select %[[SELECTED]], %[[TENSOR_DESC_0]], %[[TENSOR_DESC_1]] : vector<8xi32>
# CHECK: %[[DESC_FUSED:.*]] = arith.select %[[SELECTED]], %[[TENSOR_DESC_0]], %[[TENSOR_DESC_1]] : !amdgpu.tdm_descriptor

### resource provider
# CHECK: rocdl.tensor.load.to.lds %[[D_FUSED]], %[[DESC_FUSED]], {{.*}}, {{.*}} cachepolicy {{.*}} : vector<4xi32>, vector<8xi32>
# CHECK: amdgpu.tensor_load_to_lds %[[DESC_FUSED:.*]]
# CHECK: rocdl.s.wait.tensorcnt 0
# CHECK: rocdl.s.wait.dscnt 0
# CHECK: rocdl.s.barrier.signal id = -1
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4 changes: 2 additions & 2 deletions tests/kernel/wave_gemm_test.py
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Expand Up @@ -409,8 +409,8 @@ def testGemmGlobalToLDS(
asm = gemm.asm

assert (
"amdgpu.gather_to_lds" in asm or "tensor.load.to.lds" in asm
), "gather_to_lds / tensor.load.to.lds not found in asm"
"amdgpu.gather_to_lds" in asm or "amdgpu.tensor_load_to_lds" in asm
), "gather_to_lds / tensor_load_to_lds not found in asm"

if run_bench:
options.benchmark_results_file = perf_filename_iree
Expand Down
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