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feature: add Queue timestamp register #923

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2 changes: 1 addition & 1 deletion level_zero/core/source/cmdlist/cmdlist_hw.inl
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Original file line number Diff line number Diff line change
Expand Up @@ -3638,7 +3638,7 @@ void CommandListCoreFamily<gfxCoreFamily>::writeKernelTimestamp(uint64_t baseAdd
}
uint64_t address = ptrOffset(baseAddr, offset);

uint32_t registerOffset = isGlobalTimestamp ? RegisterOffsets::globalTimestampLdw : RegisterOffsets::gpThreadTimeRegAddressOffsetLow;
uint32_t registerOffset = isGlobalTimestamp ? RegisterOffsets::globalTimestampLdw : NEO::ContextTimestampRegister<GfxFamily>::getRegisterOffsetLow();
writeTimestamp(commandContainer, registerOffset, address, maskLsb, workloadPartition, postSyncCmdBuffer, copyOperation);
pushTimestampPatch(outTimeStampSyncCmds, offset, postSyncCmd);
adjustWriteKernelTimestamp(address, baseAddr, outTimeStampSyncCmds, workloadPartition, copyOperation, isGlobalTimestamp);
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4 changes: 2 additions & 2 deletions level_zero/core/source/cmdlist/cmdlist_hw_xe2_hpg_and_later.inl
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2024-2025 Intel Corporation
* Copyright (C) 2024-2026 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
Expand Down Expand Up @@ -31,7 +31,7 @@ void CommandListCoreFamily<gfxCoreFamily>::adjustWriteKernelTimestamp(uint64_t a
postSyncCmdBuffer = &postSyncCmd;
}

uint32_t registerOffset = globalTimestamp ? RegisterOffsets::globalTimestampUn : RegisterOffsets::gpThreadTimeRegAddressOffsetHigh;
uint32_t registerOffset = globalTimestamp ? RegisterOffsets::globalTimestampUn : NEO::ContextTimestampRegister<GfxFamily>::getRegisterOffsetHigh();
writeTimestamp(commandContainer, registerOffset, highAddress, false, workloadPartition, postSyncCmdBuffer, copyOperation);
pushTimestampPatch(outTimeStampSyncCmds, highAddress - baseAddress, postSyncCmd);
}
Expand Down
8 changes: 4 additions & 4 deletions level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_1.cpp
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Expand Up @@ -3481,11 +3481,11 @@ HWTEST2_F(CommandListCreateTests, givenCopyCommandListWhenProfilingBeforeCommand
EXPECT_NE(cmdList.end(), ++itor);

cmd = genCmdCast<MI_STORE_REGISTER_MEM *>(*itor);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + ContextTimestampRegister<FamilyType>::getRegisterOffsetLow());
EXPECT_EQ(cmd->getMemoryAddress(), ptrOffset(baseAddr, contextOffset));
EXPECT_NE(cmdList.end(), ++itor);
cmd = genCmdCast<MI_STORE_REGISTER_MEM *>(*itor);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::gpThreadTimeRegAddressOffsetHigh);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + ContextTimestampRegister<FamilyType>::getRegisterOffsetHigh());
EXPECT_EQ(cmd->getMemoryAddress(), ptrOffset(baseAddr + sizeof(uint32_t), contextOffset));
}

Expand Down Expand Up @@ -3595,11 +3595,11 @@ HWTEST2_F(CommandListCreateTests, givenCopyCommandListWhenProfilingAfterCommandF
EXPECT_NE(cmdList.end(), ++itor);

cmd = genCmdCast<MI_STORE_REGISTER_MEM *>(*itor);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + ContextTimestampRegister<FamilyType>::getRegisterOffsetLow());
EXPECT_EQ(cmd->getMemoryAddress(), ptrOffset(baseAddr, contextOffset));
EXPECT_NE(cmdList.end(), ++itor);
cmd = genCmdCast<MI_STORE_REGISTER_MEM *>(*itor);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::gpThreadTimeRegAddressOffsetHigh);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + ContextTimestampRegister<FamilyType>::getRegisterOffsetHigh());
EXPECT_EQ(cmd->getMemoryAddress(), ptrOffset(baseAddr + sizeof(uint32_t), contextOffset));
}

Expand Down
4 changes: 2 additions & 2 deletions level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_append_barrier.cpp
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Expand Up @@ -390,7 +390,7 @@ struct MultiTileCommandListAppendBarrierFixture : public MultiTileCommandListFix
validateTimestampRegisters<FamilyType>(cmdList,
begin,
RegisterOffsets::globalTimestampLdw, globalStartAddress,
RegisterOffsets::gpThreadTimeRegAddressOffsetLow, contextStartAddress,
ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), contextStartAddress,
true,
true);

Expand Down Expand Up @@ -425,7 +425,7 @@ struct MultiTileCommandListAppendBarrierFixture : public MultiTileCommandListFix
validateTimestampRegisters<FamilyType>(cmdList,
begin,
RegisterOffsets::globalTimestampLdw, globalEndAddress,
RegisterOffsets::gpThreadTimeRegAddressOffsetLow, contextEndAddress,
ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), contextEndAddress,
true,
true);
}
Expand Down
8 changes: 4 additions & 4 deletions level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_append_memory.cpp
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Expand Up @@ -762,7 +762,7 @@ HWTEST_F(AppendMemoryCopyTests, givenCopyCommandListWhenTimestampPassedToMemoryC
itor++;
EXPECT_NE(cmdList.end(), itor);
cmd = genCmdCast<MI_STORE_REGISTER_MEM *>(*itor);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + ContextTimestampRegister<FamilyType>::getRegisterOffsetLow());

itor = find<MI_FLUSH_DW *>(itor, cmdList.end());
EXPECT_NE(cmdList.end(), itor);
Expand All @@ -774,7 +774,7 @@ HWTEST_F(AppendMemoryCopyTests, givenCopyCommandListWhenTimestampPassedToMemoryC
itor++;
EXPECT_NE(cmdList.end(), itor);
cmd = genCmdCast<MI_STORE_REGISTER_MEM *>(*itor);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + ContextTimestampRegister<FamilyType>::getRegisterOffsetLow());
itor++;
EXPECT_EQ(cmdList.end(), itor);
}
Expand Down Expand Up @@ -1654,7 +1654,7 @@ HWTEST_F(StagingBuffersFixture, givenAppendMemoryCopyWithStagingAndProfilingThen
validateTimestampRegisters<FamilyType>(parsedCmdList,
begin,
RegisterOffsets::globalTimestampLdw, globalStartAddress,
RegisterOffsets::gpThreadTimeRegAddressOffsetLow, contextStartAddress,
ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), contextStartAddress,
false,
true);

Expand All @@ -1663,7 +1663,7 @@ HWTEST_F(StagingBuffersFixture, givenAppendMemoryCopyWithStagingAndProfilingThen
validateTimestampRegisters<FamilyType>(parsedCmdList,
itorWalkers[1],
RegisterOffsets::globalTimestampLdw, globalEndAddress,
RegisterOffsets::gpThreadTimeRegAddressOffsetLow, contextEndAddress,
ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), contextEndAddress,
false,
true);
}
Expand Down
12 changes: 6 additions & 6 deletions level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_append_signal_event.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -864,15 +864,15 @@ HWTEST2_F(CommandListAppendUsedPacketSignalEvent,
startCmdList,
RegisterOffsets::globalTimestampLdw, globalStartAddress,
RegisterOffsets::globalTimestampUn, globalStartAddressHigh,
RegisterOffsets::gpThreadTimeRegAddressOffsetLow, contextStartAddress,
RegisterOffsets::gpThreadTimeRegAddressOffsetHigh, contextStartAddressHigh,
ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), contextStartAddress,
ContextTimestampRegister<FamilyType>::getRegisterOffsetHigh(), contextStartAddressHigh,
true,
true);
} else {
validateTimestampRegisters<FamilyType>(cmdList,
startCmdList,
RegisterOffsets::globalTimestampLdw, globalStartAddress,
RegisterOffsets::gpThreadTimeRegAddressOffsetLow, contextStartAddress,
ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), contextStartAddress,
true,
true);
}
Expand All @@ -884,15 +884,15 @@ HWTEST2_F(CommandListAppendUsedPacketSignalEvent,
startCmdList,
RegisterOffsets::globalTimestampLdw, globalEndAddress,
RegisterOffsets::globalTimestampUn, globalEndAddressHigh,
RegisterOffsets::gpThreadTimeRegAddressOffsetLow, contextEndAddress,
RegisterOffsets::gpThreadTimeRegAddressOffsetHigh, contextEndAddressHigh,
ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), contextEndAddress,
ContextTimestampRegister<FamilyType>::getRegisterOffsetHigh(), contextEndAddressHigh,
true,
true);
} else {
validateTimestampRegisters<FamilyType>(cmdList,
startCmdList,
RegisterOffsets::globalTimestampLdw, globalEndAddress,
RegisterOffsets::gpThreadTimeRegAddressOffsetLow, contextEndAddress,
ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), contextEndAddress,
true,
true);
}
Expand Down
4 changes: 2 additions & 2 deletions level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_blit.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -470,7 +470,7 @@ HWTEST_F(AppendMemoryCopyTests, givenCopyCommandListWhenTimestampPassedToMemoryC
itor++;
EXPECT_NE(cmdList.end(), itor);
cmd = genCmdCast<MI_STORE_REGISTER_MEM *>(*itor);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + ContextTimestampRegister<FamilyType>::getRegisterOffsetLow());
EXPECT_EQ(cmd->getMemoryAddress(), ptrOffset(baseAddr, contextStartOffset));
itor++;
itor = find<MI_STORE_REGISTER_MEM *>(itor, cmdList.end());
Expand All @@ -481,7 +481,7 @@ HWTEST_F(AppendMemoryCopyTests, givenCopyCommandListWhenTimestampPassedToMemoryC
itor++;
EXPECT_NE(cmdList.end(), itor);
cmd = genCmdCast<MI_STORE_REGISTER_MEM *>(*itor);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
EXPECT_EQ(cmd->getRegisterAddress(), RegisterOffsets::bcs0Base + ContextTimestampRegister<FamilyType>::getRegisterOffsetLow());
EXPECT_EQ(cmd->getMemoryAddress(), ptrOffset(baseAddr, contextEndOffset));
itor++;
EXPECT_EQ(cmdList.end(), itor);
Expand Down
10 changes: 5 additions & 5 deletions level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_xe2_and_later.cpp
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2024-2025 Intel Corporation
* Copyright (C) 2024-2026 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
Expand Down Expand Up @@ -107,18 +107,18 @@ struct CommandListXe2AndLaterFixture : public DeviceFixture {
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[0]), globalAddress, RegisterOffsets::csGprR12);
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[1]), globalAddress + sizeof(uint32_t), RegisterOffsets::globalTimestampUn);
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[2]), contextAddress, RegisterOffsets::csGprR12);
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[3]), contextAddress + sizeof(uint32_t), RegisterOffsets::gpThreadTimeRegAddressOffsetHigh);
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[3]), contextAddress + sizeof(uint32_t), ContextTimestampRegister<FamilyType>::getRegisterOffsetHigh());

validateLrrCommand<FamilyType>(reinterpret_cast<MI_LOAD_REGISTER_REG *>(*srmCommands[4]), RegisterOffsets::globalTimestampLdw);
validateLrrCommand<FamilyType>(reinterpret_cast<MI_LOAD_REGISTER_REG *>(*srmCommands[5]), RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
validateLrrCommand<FamilyType>(reinterpret_cast<MI_LOAD_REGISTER_REG *>(*srmCommands[5]), ContextTimestampRegister<FamilyType>::getRegisterOffsetLow());

} else {
ASSERT_EQ(4u, srmCommands.size());

validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[0]), globalAddress, RegisterOffsets::globalTimestampLdw);
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[1]), globalAddress + sizeof(uint32_t), RegisterOffsets::globalTimestampUn);
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[2]), contextAddress, RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[3]), contextAddress + sizeof(uint32_t), RegisterOffsets::gpThreadTimeRegAddressOffsetHigh);
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[2]), contextAddress, ContextTimestampRegister<FamilyType>::getRegisterOffsetLow());
validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[3]), contextAddress + sizeof(uint32_t), ContextTimestampRegister<FamilyType>::getRegisterOffsetHigh());
}
}

Expand Down
4 changes: 2 additions & 2 deletions opencl/source/command_queue/enqueue_common.h
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Original file line number Diff line number Diff line change
Expand Up @@ -751,14 +751,14 @@ void CommandQueueHw<GfxFamily>::processDispatchForMarkerWithTimestampPacket(Comm
auto timestampContextStartGpuAddress = TimestampPacketHelper::getContextStartGpuAddress(*currentTimestampPacketNode);
auto timestampGlobalStartAddress = TimestampPacketHelper::getGlobalStartGpuAddress(*currentTimestampPacketNode);
bool isBcs = NEO::EngineHelpers::isBcs(getGpgpuCommandStreamReceiver().getOsContext().getEngineType());
EncodeStoreMMIO<GfxFamily>::encode(*commandStream, RegisterOffsets::gpThreadTimeRegAddressOffsetLow, timestampContextStartGpuAddress, false, nullptr, isBcs);
EncodeStoreMMIO<GfxFamily>::encode(*commandStream, ContextTimestampRegister<GfxFamily>::getRegisterOffsetLow(), timestampContextStartGpuAddress, false, nullptr, isBcs);
EncodeStoreMMIO<GfxFamily>::encode(*commandStream, RegisterOffsets::globalTimestampLdw, timestampGlobalStartAddress, false, nullptr, isBcs);
MemorySynchronizationCommands<GfxFamily>::encodeAdditionalTimestampOffsets(*commandStream, timestampContextStartGpuAddress, timestampGlobalStartAddress, isBcs);

auto timestampContextEndGpuAddress = TimestampPacketHelper::getContextEndGpuAddress(*currentTimestampPacketNode);
auto timestampGlobalEndAddress = TimestampPacketHelper::getGlobalEndGpuAddress(*currentTimestampPacketNode);

EncodeStoreMMIO<GfxFamily>::encode(*commandStream, RegisterOffsets::gpThreadTimeRegAddressOffsetLow, timestampContextEndGpuAddress, false, nullptr, isBcs);
EncodeStoreMMIO<GfxFamily>::encode(*commandStream, ContextTimestampRegister<GfxFamily>::getRegisterOffsetLow(), timestampContextEndGpuAddress, false, nullptr, isBcs);
EncodeStoreMMIO<GfxFamily>::encode(*commandStream, RegisterOffsets::globalTimestampLdw, timestampGlobalEndAddress, false, nullptr, isBcs);
MemorySynchronizationCommands<GfxFamily>::encodeAdditionalTimestampOffsets(*commandStream, timestampContextEndGpuAddress, timestampGlobalEndAddress, isBcs);
}
Expand Down
8 changes: 4 additions & 4 deletions opencl/test/unit_test/profiling/profiling_tests.cpp
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Expand Up @@ -306,13 +306,13 @@ HWCMDTEST_F(IGFX_GEN12LP_CORE, ProfilingTests, GivenCommandQueueWithProflingWhen
auto pBeforeMI = genCmdCast<MI_STORE_REGISTER_MEM *>(*itorBeforeMI);
pBeforeMI = genCmdCast<MI_STORE_REGISTER_MEM *>(*itorBeforeMI);
ASSERT_NE(nullptr, pBeforeMI);
EXPECT_EQ(RegisterOffsets::gpThreadTimeRegAddressOffsetLow, pBeforeMI->getRegisterAddress());
EXPECT_EQ(ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), pBeforeMI->getRegisterAddress());

auto itorAfterMI = find<MI_STORE_REGISTER_MEM *>(itorGPGPUWalkerCmd, cmdList.end());
ASSERT_NE(cmdList.end(), itorAfterMI);
auto pAfterMI = genCmdCast<MI_STORE_REGISTER_MEM *>(*itorAfterMI);
ASSERT_NE(nullptr, pAfterMI);
EXPECT_EQ(RegisterOffsets::gpThreadTimeRegAddressOffsetLow, pAfterMI->getRegisterAddress());
EXPECT_EQ(ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), pAfterMI->getRegisterAddress());
++itorAfterMI;
pAfterMI = genCmdCast<MI_STORE_REGISTER_MEM *>(*itorAfterMI);
EXPECT_EQ(nullptr, pAfterMI);
Expand Down Expand Up @@ -425,13 +425,13 @@ HWCMDTEST_F(IGFX_GEN12LP_CORE, ProfilingTests, GivenCommandQueueBlockedWithProfi
auto pBeforeMI = genCmdCast<MI_STORE_REGISTER_MEM *>(*itorBeforeMI);
pBeforeMI = genCmdCast<MI_STORE_REGISTER_MEM *>(*itorBeforeMI);
ASSERT_NE(nullptr, pBeforeMI);
EXPECT_EQ(RegisterOffsets::gpThreadTimeRegAddressOffsetLow, pBeforeMI->getRegisterAddress());
EXPECT_EQ(ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), pBeforeMI->getRegisterAddress());

auto itorAfterMI = find<MI_STORE_REGISTER_MEM *>(itorGPGPUWalkerCmd, cmdList.end());
ASSERT_NE(cmdList.end(), itorAfterMI);
auto pAfterMI = genCmdCast<MI_STORE_REGISTER_MEM *>(*itorAfterMI);
ASSERT_NE(nullptr, pAfterMI);
EXPECT_EQ(RegisterOffsets::gpThreadTimeRegAddressOffsetLow, pAfterMI->getRegisterAddress());
EXPECT_EQ(ContextTimestampRegister<FamilyType>::getRegisterOffsetLow(), pAfterMI->getRegisterAddress());
++itorAfterMI;
EXPECT_EQ(itorAfterMI, cmdList.end());
clReleaseEvent(event);
Expand Down
8 changes: 4 additions & 4 deletions opencl/test/unit_test/xe3p_core/command_stream_receiver_hw_tests_xe3p_core.cpp
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Expand Up @@ -120,11 +120,11 @@ XE3P_CORETEST_F(CommandStreamReceiverXe3pCoreTests, givenProfilingEnabledWhenBli
};

{
verifyLri(cmdIterator, RegisterOffsets::gpThreadTimeRegAddressOffsetHigh, timestampContextStartGpuAddress + sizeof(uint32_t));
verifyLri(cmdIterator, RegisterOffsets::queueTimestampRegAddressOffsetHigh, timestampContextStartGpuAddress + sizeof(uint32_t));

verifyLri(++cmdIterator, RegisterOffsets::globalTimestampUn, timestampGlobalStartAddress + sizeof(uint32_t));

verifyLri(++cmdIterator, RegisterOffsets::gpThreadTimeRegAddressOffsetLow, timestampContextStartGpuAddress);
verifyLri(++cmdIterator, RegisterOffsets::queueTimestampRegAddressOffsetLow, timestampContextStartGpuAddress);

verifyLri(++cmdIterator, RegisterOffsets::globalTimestampLdw, timestampGlobalStartAddress);
}
Expand All @@ -137,11 +137,11 @@ XE3P_CORETEST_F(CommandStreamReceiverXe3pCoreTests, givenProfilingEnabledWhenBli

{

verifyLri(++cmdIterator, RegisterOffsets::gpThreadTimeRegAddressOffsetHigh, timestampContextEndGpuAddress + sizeof(uint32_t));
verifyLri(++cmdIterator, RegisterOffsets::queueTimestampRegAddressOffsetHigh, timestampContextEndGpuAddress + sizeof(uint32_t));

verifyLri(++cmdIterator, RegisterOffsets::globalTimestampUn, timestampGlobalEndAddress + sizeof(uint32_t));

verifyLri(++cmdIterator, RegisterOffsets::gpThreadTimeRegAddressOffsetLow, timestampContextEndGpuAddress);
verifyLri(++cmdIterator, RegisterOffsets::queueTimestampRegAddressOffsetLow, timestampContextEndGpuAddress);

verifyLri(++cmdIterator, RegisterOffsets::globalTimestampLdw, timestampGlobalEndAddress);
}
Expand Down
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