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@hainest hainest commented Dec 30, 2024

@bbiiggppiigg No register for all three amdgpu architectures seem to be flags (according to isFlag).

@hainest hainest self-assigned this Dec 30, 2024
@hainest hainest force-pushed the thaines/machregister_type_queries branch from 0140630 to a48ff83 Compare December 30, 2024 14:44
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@bbiiggppiigg No register for all three amdgpu architectures seem to be flags (according to isFlag).

I know some of the registers should be flag but are defined as HWR for now.
I should probably clean up the register definitions a bit. (And maybe how getBaseRegister is done for AMDGPU)
If this is not blocking any changes you're doing, I think I should wait until you are done with all your MachRegister changes.

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hainest commented Dec 30, 2024

@bbiiggppiigg No register for all three amdgpu architectures seem to be flags (according to isFlag).

I know some of the registers should be flag but are defined as HWR for now. I should probably clean up the register definitions a bit. (And maybe how getBaseRegister is done for AMDGPU) If this is not blocking any changes you're doing, I think I should wait until you are done with all your MachRegister changes.

Nope, it's not blocking me. I just wanted to make sure I had covered all the cases.

@hainest hainest force-pushed the thaines/machregister_type_queries branch from 0316664 to 969d0b0 Compare January 12, 2025 15:47
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hainest commented Jan 29, 2025

Moved to dyninst/dyninst#1855.

@hainest hainest closed this Jan 29, 2025
@hainest hainest deleted the thaines/machregister_type_queries branch January 29, 2025 23:34
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3 participants