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EE / CS Engineer ## ≡ᗤ- / Digital IC / FPGA / MCU + SystemVerilog / C++ / C ##
Enthusiast of computer hardware but also interested in everything ##
- Mare Tranquillitatis
- https://virt.moe/
- zeitgeist_io
Highlights
Pinned Loading
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axi-dma-controller
axi-dma-controller PublicUltra High Performance AXI4-based Direct Memory Access (DMA) Controller. This project was an interview assignment. Work in Progress.
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verilator
verilator PublicForked from verilator/verilator
Verilator open-source SystemVerilog simulator and lint system
C++
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neorv32
neorv32 PublicForked from stnolting/neorv32
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
VHDL 1
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Rockchip-FFmpeg
Rockchip-FFmpeg PublicBackup repository for https://github.com/rockchip-linux/ffmpeg (no longer available). For archive purpose only.
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