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@desertsagebrush desertsagebrush commented Nov 11, 2025

Detailed description

Adding/expanding support for Renesas RA6M5, RA4M1, and RA2E1 microcontrollers.

Todo:

  • Add ID codes and confirm probe support
  • Implement flashing for MF4/MF3 flash on the RA2E1 (RV40 flash for the RA6M5 is already supported)
  • Handle RA4 MF3/4 flash gracefully (different block size)
  • Possibly support the OCDREG control registers hanging off of AP1 (APB-AP)

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@dragonmux dragonmux added this to the v2.1 release milestone Nov 11, 2025
@dragonmux dragonmux added Enhancement General project improvement New Target New debug target labels Nov 11, 2025
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desertsagebrush commented Nov 24, 2025

Still todo:

  • Handle the different block size for RA4 flash
  • Update comments/etc to include the new RA family members
  • Handle the OCDREG AP?
  • Test more thoroughly
  • Possibly split the flash routines into their own files?
  • Possibly split the families into two feature flags to reduce the size burden?

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Done a review - very happy with the general direction you're managing to take this, there are only a few fairly small details we spotted that could do with being cleaned up/sorted.

Comment on lines 247 to 252
#define MF3_CF_BLOCK_SIZE (0x800U)
#define MF3_RA2A1_CF_BLOCK_SIZE (0x400U)
#define MF3_RA2A1_CF_BLOCK_SIZE (0x400U) // Contradicted by RA2A1 Ref Manual
#define MF3_DF_BLOCK_SIZE (0x400U)
#define MF3_CF_WRITE_SIZE (0x40U)
#define MF3_CF_WRITE_SIZE (0x8U)
#define MF3_RA2E1_CF_WRITE_SIZE (0x4U)
#define MF3_DF_WRITE_SIZE (0x1U)
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We're aware this is, on your part, a "following the style set before", however the parens here are not doing anything useful and can (should) be dropped please. Their presence doesn't follow any of the rest of the code base.

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Sounds good! Would you like me to remove those from other places in this file while I'm at it?

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Yes, please.

/* Code flash or data flash operation */
const bool code_flash = addr < RENESAS_CF_END;

while (len) {
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If it's possible to express this as a for loop over len, keeping len and addr constant, it would be better - the compiler's able to generate better code for this and prove to itself the correctness of the loop for optimisation purposes. Adding/tracking an offset turns out to be ~free due to instruction set things the compiler can take advantage of.

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Sounds good; Would you like me to see about doing the same thing for the RV40 flash functions, which follow the same pattern?

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That would be good, yes 🙂

target_mem32_write16(target, MF3_FSARL, (const uint16_t)(dest & 0xffffU));
target_mem32_write16(target, MF3_FSARH, (const uint16_t)((dest >> 16) & 0xffffU));

while (len) {
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Same query here, especially as src could be cast to a buffer pointer so you only have one cast to uint8_t to do and then everything else already uses the right pointer width for the remainder

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Currently, it mostly works; for some reason, repeated scans of the same target may not properly identify the device and report it as an unknown device (but it does call the renesas_ra_probe method, so something is afoot in there, it seems). Also, sometimes the device seems to report that it has erased successfully but then throws a programming error every time it tries to program a previously written block. My guess is that there needs to be a delay post calling erase so that it can finish actually erasing even though the command is reporting that it finished properly, but I could be wrong.

Progress though!

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