sched/signals: add support to partially or fully disable signals

arch/arm/include/arm/irq.h

@@ -129,11 +129,13 @@
 #ifndef __ASSEMBLY__
 struct xcptcontext
 {
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* These are saved copies of the context used during
    * signal processing.
    */
 
   uint32_t *saved_regs;
+#endif
 
   /* Register save area with XCPTCONTEXT_SIZE, only valid when:
    * 1.The task isn't running or

arch/arm/include/armv6-m/irq.h

@@ -158,6 +158,7 @@ struct xcpt_syscall_s
 
 struct xcptcontext
 {
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* These are saved copies of the context used during
    * signal processing.
    */
@@ -171,6 +172,7 @@ struct xcptcontext
 
   uint32_t sigreturn;
 #endif
+#endif /* CONFIG_ENABLE_ALL_SIGNALS */
 
 #ifdef CONFIG_LIB_SYSCALL
   /* The following array holds the return address and the exc_return value

arch/arm/include/armv7-a/irq.h

@@ -259,6 +259,7 @@ struct xcpt_syscall_s
 
 struct xcptcontext
 {
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* These are saved copies of the context used during
    * signal processing.
    */
@@ -273,6 +274,7 @@ struct xcptcontext
   uint32_t sigreturn;
 
 #endif
+#endif /* CONFIG_ENABLE_ALL_SIGNALS */
 
   /* Register save area with XCPTCONTEXT_SIZE, only valid when:
    * 1.The task isn't running or

arch/arm/include/armv7-m/irq.h

@@ -214,6 +214,7 @@ struct xcpt_syscall_s
 
 struct xcptcontext
 {
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* These are saved copies of the context used during
    * signal processing.
    */
@@ -228,6 +229,7 @@ struct xcptcontext
   uint32_t sigreturn;
 
 #endif
+#endif /* CONFIG_ENABLE_ALL_SIGNALS */
 
 #ifdef CONFIG_LIB_SYSCALL
   /* The following array holds the return address and the exc_return value

arch/arm/include/armv7-r/irq.h

@@ -259,6 +259,7 @@ struct xcpt_syscall_s
 
 struct xcptcontext
 {
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* These are saved copies of the context used during
    * signal processing.
    */
@@ -272,6 +273,7 @@ struct xcptcontext
 
   uint32_t sigreturn;
 #endif
+#endif /* CONFIG_ENABLE_ALL_SIGNALS */
 
   /* Register save area with XCPTCONTEXT_SIZE, only valid when:
    * 1.The task isn't running or

arch/arm/include/armv8-m/irq.h

@@ -225,6 +225,7 @@ struct xcpt_syscall_s
 
 struct xcptcontext
 {
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* These are saved copies of the context used during
    * signal processing.
    */
@@ -239,6 +240,7 @@ struct xcptcontext
   uint32_t sigreturn;
 
 #endif
+#endif /* CONFIG_ENABLE_ALL_SIGNALS */
 
 #ifdef CONFIG_LIB_SYSCALL
   /* The following array holds the return address and the exc_return value

arch/arm/include/armv8-r/irq.h

@@ -259,6 +259,7 @@ struct xcpt_syscall_s
 
 struct xcptcontext
 {
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* These are saved copies of the context used during
    * signal processing.
    */
@@ -272,6 +273,7 @@ struct xcptcontext
 
   uint32_t sigreturn;
 #endif
+#endif /* CONFIG_ENABLE_ALL_SIGNALS */
 
   /* Register save area with XCPTCONTEXT_SIZE, only valid when:
    * 1.The task isn't running or

arch/arm/include/tlsr82/irq.h

@@ -160,12 +160,13 @@
 #ifndef __ASSEMBLY__
 struct xcptcontext
 {
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* These are saved register array pointer used during
    * signal processing.
    */
 
   uint32_t *saved_regs;
-
+#endif /* CONFIG_ENABLE_ALL_SIGNALS */
   /* Register save area */
 
   uint32_t *regs;

arch/arm/src/arm/CMakeLists.txt

@@ -29,8 +29,6 @@ list(
   arm_doirq.c
   arm_initialstate.c
   arm_prefetchabort.c
-  arm_schedulesigaction.c
-  arm_sigdeliver.c
   arm_syscall.c
   arm_tcbinfo.c
   arm_undefinedinsn.c
@@ -39,6 +37,10 @@ list(
   arm_vectortab.S
   arm_saveusercontext.S)
 
+if(CONFIG_ENABLE_ALL_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(CONFIG_PAGING)
   list(APPEND SRCS arm_pginitialize.c arm_checkmapping.c arm_allocpage.c
        arm_va2pte.c)

arch/arm/src/arm/Make.defs

@@ -27,13 +27,17 @@ include common/Make.defs
 HEAD_ASRC  = arm_head.S
 
 CMN_CSRCS += arm_dataabort.c arm_doirq.c arm_initialstate.c
-CMN_CSRCS += arm_prefetchabort.c arm_schedulesigaction.c
-CMN_CSRCS += arm_sigdeliver.c arm_syscall.c arm_tcbinfo.c
+CMN_CSRCS += arm_prefetchabort.c
+CMN_CSRCS += arm_syscall.c arm_tcbinfo.c
 CMN_CSRCS += arm_undefinedinsn.c
 
 CMN_ASRCS += arm_cache.S arm_vectors.S arm_vectortab.S
 CMN_ASRCS += arm_saveusercontext.S
 
+ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifeq ($(CONFIG_LEGACY_PAGING),y)
   CMN_CSRCS += arm_pginitialize.c arm_checkmapping.c arm_allocpage.c arm_va2pte.c
 endif

arch/arm/src/arm/arm_vectors.S

@@ -182,7 +182,7 @@ arm_vectorirq:
 	/* Call arm_decodeirq() on the interrupt stack */
 
 	ldr	sp, .Lirqstacktop	/* SP = interrupt stack top */
-#else
+#elif defined(CONFIG_ENABLE_ALL_SIGNALS)
 	/* Call arm_decodeirq() on the user stack */
 
 	/* If the interrupt stack is disabled, reserve xcpcontext to ensure

arch/arm/src/armv6-m/CMakeLists.txt

@@ -27,13 +27,15 @@ set(SRCS
     arm_doirq.c
     arm_hardfault.c
     arm_initialstate.c
-    arm_schedulesigaction.c
-    arm_sigdeliver.c
     arm_svcall.c
     arm_systemreset.c
     arm_tcbinfo.c
     arm_trigger_irq.c)
 
+if(CONFIG_ENABLE_ALL_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(NOT CONFIG_ARCH_HAVE_CUSTOM_VECTORS)
   list(APPEND SRCS arm_vectors.c)
 endif()

arch/arm/src/armv6-m/Make.defs

@@ -27,10 +27,14 @@ include common/Make.defs
 CMN_ASRCS += arm_exception.S arm_saveusercontext.S
 
 CMN_CSRCS += arm_cpuinfo.c arm_doirq.c arm_hardfault.c arm_initialstate.c
-CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_svcall.c
+CMN_CSRCS += arm_svcall.c
 CMN_CSRCS += arm_systemreset.c arm_tcbinfo.c
 CMN_CSRCS += arm_trigger_irq.c
 
+ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifneq ($(CONFIG_ARCH_HAVE_CUSTOM_VECTORS),y)
   CMN_CSRCS += arm_vectors.c
 endif

arch/arm/src/armv6-m/arm_doirq.c

@@ -86,13 +86,15 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
 
       irq_dispatch(irq, regs);
 #endif
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
       if (tcb->sigdeliver)
         {
           /* Pendsv able to access running tcb with no critical section */
 
           up_schedule_sigaction(tcb);
         }
 
+#endif
       up_irq_save();
     }
   else

arch/arm/src/armv6-m/arm_exception.S

@@ -158,7 +158,9 @@ exception_common:
 	lsls		r2, #(31 - EXC_RETURN_THREAD_BITNO)	/* Move to bit 31 */
 	bpl		3f					/* Test bit 31 */
 	mov		r2, r1					/* Reserve signal context */
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
 	subs		r2, r2, #XCPTCONTEXT_SIZE
+#endif
 	msr		msp, r2					/* We are using the main stack pointer */
 	isb		sy
 3:

arch/arm/src/armv7-a/CMakeLists.txt

@@ -43,14 +43,16 @@ list(
   arm_initialstate.c
   arm_mmu.c
   arm_prefetchabort.c
-  arm_schedulesigaction.c
-  arm_sigdeliver.c
   arm_syscall.c
   arm_tcbinfo.c
   arm_undefinedinsn.c
   arm_perf.c
   cp15_cacheops.c)
 
+if(CONFIG_ENABLE_ALL_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(CONFIG_ARMV7A_GICv2M)
   list(APPEND SRCS arm_gicv2m.c)
 endif()

arch/arm/src/armv7-a/Make.defs

@@ -38,10 +38,13 @@ CMN_ASRCS += arm_cpuhead.S arm_vectors.S arm_saveusercontext.S
 CMN_CSRCS += arm_cache.c arm_cpuinfo.c arm_dataabort.c
 CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_gicv2_dump.c
 CMN_CSRCS += arm_initialstate.c arm_mmu.c arm_prefetchabort.c
-CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
 CMN_CSRCS += arm_syscall.c arm_tcbinfo.c arm_undefinedinsn.c
 CMN_CSRCS += arm_perf.c cp15_cacheops.c
 
+ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifeq ($(CONFIG_ARMV7A_GICv2M),y)
   CMN_CSRCS += arm_gicv2m.c
 endif

arch/arm/src/armv7-a/arm_syscall.c

@@ -359,7 +359,7 @@ uint32_t *arm_syscall(uint32_t *regs)
         break;
 #endif
 
-#ifdef CONFIG_BUILD_KERNEL
+#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_ENABLE_ALL_SIGNALS)
       /* R0=SYS_signal_handler:  This a user signal handler callback
        *
        * void signal_handler(_sa_sigaction_t sighand, int signo,
@@ -439,9 +439,7 @@ uint32_t *arm_syscall(uint32_t *regs)
 #endif
         }
         break;
-#endif
 
-#ifdef CONFIG_BUILD_KERNEL
       /* R0=SYS_signal_handler_return:  This a user signal handler callback
        *
        *   void signal_handler_return(void);
@@ -480,7 +478,7 @@ uint32_t *arm_syscall(uint32_t *regs)
 #endif
         }
         break;
-#endif
+#endif /* CONFIG_BUILD_KERNEL && CONFIG_ENABLE_ALL_SIGNALS */
 
       /* This is not an architecture-specific system call.  If NuttX is built
        * as a standalone kernel with a system call interface, then all of the

arch/arm/src/armv7-a/arm_vectors.S

@@ -219,7 +219,7 @@ arm_vectorirq:
 	/* Call arm_decodeirq() on the interrupt stack */
 
 	setirqstack	r1, r3				/* SP = interrupt stack top */
-#else
+#elif defined(CONFIG_ENABLE_ALL_SIGNALS)
 	/* Call arm_decodeirq() on the user stack */
 
 	/* If the interrupt stack is disabled, reserve xcpcontext to ensure
@@ -337,7 +337,8 @@ arm_vectorsvc:
 	/* Call arm_syscall() on the interrupt stack */
 
 	setirqstack	r1, r3				/* SP = interrupt stack top */
-#else
+
+#elif defined(CONFIG_ENABLE_ALL_SIGNALS)
 	/* Call arm_syscall() on the user stack */
 
 	/* If the interrupt stack is disabled, reserve xcpcontext to ensure

arch/arm/src/armv7-m/CMakeLists.txt

@@ -34,15 +34,17 @@ set(SRCS
     arm_itm.c
     arm_memfault.c
     arm_perf.c
-    arm_schedulesigaction.c
-    arm_sigdeliver.c
     arm_svcall.c
     arm_systemreset.c
     arm_tcbinfo.c
     arm_trigger_irq.c
     arm_usagefault.c
     arm_dbgmonitor.c)
 
+if(CONFIG_ENABLE_ALL_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(NOT CONFIG_ARCH_HAVE_CUSTOM_VECTORS)
   list(APPEND SRCS arm_vectors.c)
 endif()

arch/arm/src/armv7-m/Make.defs

@@ -29,10 +29,13 @@ CMN_ASRCS += arm_exception.S arm_saveusercontext.S
 CMN_CSRCS += arm_busfault.c arm_cache.c arm_cpuinfo.c arm_doirq.c
 CMN_CSRCS += arm_hardfault.c arm_initialstate.c arm_itm.c
 CMN_CSRCS += arm_memfault.c arm_perf.c
-CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
 CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_tcbinfo.c
 CMN_CSRCS += arm_trigger_irq.c arm_usagefault.c arm_dbgmonitor.c
 
+ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifneq ($(CONFIG_ARCH_HAVE_CUSTOM_VECTORS),y)
   CMN_CSRCS += arm_vectors.c
 endif

arch/arm/src/armv7-m/arm_doirq.c

@@ -86,13 +86,16 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
 
       irq_dispatch(irq, regs);
 #endif
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
       if (tcb->sigdeliver)
         {
           /* Pendsv able to access running tcb with no critical section */
 
           up_schedule_sigaction(tcb);
         }
 
+#endif
+
       up_irq_save();
     }
   else

arch/arm/src/armv7-r/CMakeLists.txt

@@ -39,14 +39,16 @@ list(
   arm_doirq.c
   arm_initialstate.c
   arm_prefetchabort.c
-  arm_schedulesigaction.c
-  arm_sigdeliver.c
   arm_syscall.c
   arm_tcbinfo.c
   arm_undefinedinsn.c
   arm_perf.c
   cp15_cacheops.c)
 
+if(CONFIG_ENABLE_ALL_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(NOT CONFIG_ARCH_CHIP STREQUAL tms570)
   list(APPEND SRCS arm_gicv2.c arm_gicv2_dump.c)
 endif()