Full SME(1) instruction support and STREAMING Groups#415

Merged

FinnWilkinson merged 48 commits into

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additional-sme-support

Feb 6, 2025

Commits on Dec 20, 2024

Added STREAMING versions of relevant aarch64 instruction groups.
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Removed un-used macros from AArch64 Instruction decode.
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Moved aarch64 getGroup logic to instruction_decode.
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Moved riscv getGroup logic to instruction_decode.
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Updated unit tests after changing getGroup logic.
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Added new AArch64 groups to model config and updated integration test.
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Added streaming mode enabled helper functions.
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Added STREAMING group logic to instruction_decode, and logic to change instruction group to STREAMING if SM mode is different to when instruction was first decoded.
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Fixed minor issues with new streaming groups and updated SME example config file.
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Re-wrote checkStreamingGroup function.
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Added unit tests for new AArch64 STREAMING groups functionality.
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Updated aarch64 groups diagram in docs.
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Added SME instruction FMOPS (S and D) support and regression tests.
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Added SME instruction SMOPA (S and D) support and regression tests.
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Added SME instruction SMOPS (S and D) support and regression tests.
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Added SME instructions UMOPA and UMOPS (S and D) support and regression tests.
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Fix jenkins build error.
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Added SME instructions SUMOPA and SUMOPS (S and D) support and regression tests.
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Updated SUMOPA and SUMOPS tests.
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Added SME instructions USMOPA and USMOPS (S and D) support and regression tests.
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Fix jenkins build error pt2.
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Implemented SME STR instruction and regression test.
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Fixed execution logic for vertical ST1D and ST1W SME stores.
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Implemented SME ST1B and ST1H (H and V) instruction logic.
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Implemented SME LD1B and LD1H (H and V) instruction logic.
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Added SME LD1B and LD1H regression tests.
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Updated ST1D and ST1W SME regression tests.
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Added SME ST1B and ST1H regression tests.
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Implemented SME MOVA (Tile to Vec, horizontal) instructions and regression test (B, H, S, D)
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Implemented SME MOVA (Tile to Vec, vertical) instructions and regression test (B, H, S, D)
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Implemented SME MOV (Tile to Vec, vertical and horizontal) instruction alias and regression tests (B, H, S, D)
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Implemented SME MOVA/MOV (Vec to Tile, vertical and horizontal) instructions and aliases and regression tests (B, H, S, D)
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Implemented SME LDR instruction and regression tests.
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Implemented SME ADDHA and ADDVA (S and D) instructions and regression tests.
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Updated ADDHA test to make more specific.
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Corrected ADDVA execution logic.
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Updated ADDVA test to make more specific.
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Added SME MOVA (tile to vec, vec to tile) Quad-word instructions and regression tests.
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Implemented SME ST1Q and LD1Q (V and H) instructions and regression tests.
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Removed werror.
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NEON instruction logic fixes.
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Attended PR comments.
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Switched order of concatonation for NEON UMAXP instruction to match Hardware.
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Fixed LD1W (into ZA, 32-bit) buffer overflow error.
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Removed STREAMING_SVE and STREAMING_PREDICATE groups and associated logic.
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Reverted docs aarch64 instruction groups image.
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Fixed order of vector concat for NEON uminp.
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Post rebase fixes.
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