Skip to content

ram: latch-based memory support#10290

Draft
tnguy19 wants to merge 11 commits intoThe-OpenROAD-Project:masterfrom
tnguy19:latch-ram
Draft

ram: latch-based memory support#10290
tnguy19 wants to merge 11 commits intoThe-OpenROAD-Project:masterfrom
tnguy19:latch-ram

Conversation

@tnguy19
Copy link
Copy Markdown
Contributor

@tnguy19 tnguy19 commented Apr 28, 2026

Summary

Add support for latch-based memory with the flag -use_latch. An additional row of negative latches is added , input data is connected to the D port of a negative latch and the Q port of this latch is connected to the D port of each (positive latch) bitcell.
The code can automatically detect latch gates for sky130 and nangate45.

Note: currently only support 1 write port, support for multiple ports will be added when that feature is implemented.

Type of Change

  • New feature

Impact

  • User can use -use_latch to indicate whether they want to use latch-based memory. The default value is 0 so dff-based ram is used by default. Scripts that do not have this flag are not affected.
  • Using latch-based ram gives identical functional behavior as dff-ram
  • Input buffer is currently placed before the negative latch row. Buffer placement after the latch may be revisited with timing analysis in a future enhancement
  • Support col/mux ratio = 1, 2, 4

Verification

  • I have verified that the local build succeeds (./etc/Build.sh).
  • I have run the relevant tests and they pass.
  • My code follows the repository's formatting guidelines.
  • I have included tests to prevent regressions.
  • I have signed my commits (DCO).

Related Issues

Fixes #10153

@rovinski

tnguy19 added 8 commits April 28, 2026 09:28
Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
…files for 8x8 with ratio=4, update golden files for 8x8 ratio=2

Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
…mn_mux_ratio > 1 to avoid congestion in wiring when column_mux_ratio = 4

Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
… for pin on right edge, update golden files

Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
Copy link
Copy Markdown
Contributor

@gemini-code-assist gemini-code-assist Bot left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Code Review

This pull request introduces support for latch-based RAM generation by adding a new 'use_latch' parameter to the RAM generator and associated command-line interfaces. The implementation includes logic to identify and place latch cells, as well as necessary updates to the grid layout and netlist generation. I have provided feedback regarding a dangerous type cast in the port iteration logic, a potential bug where a cell is overwritten in the layout, and a suggestion to guard the latch port mapping assignment.

Comment thread src/ram/src/ram.cpp Outdated
Comment thread src/ram/src/ram.cpp Outdated
Comment thread src/ram/src/ram.cpp Outdated
@github-actions
Copy link
Copy Markdown
Contributor

clang-tidy review says "All clean, LGTM! 👍"

Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
@github-actions
Copy link
Copy Markdown
Contributor

clang-tidy review says "All clean, LGTM! 👍"

Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
@github-actions
Copy link
Copy Markdown
Contributor

clang-tidy review says "All clean, LGTM! 👍"

Signed-off-by: Thinh Nguyen <nguyenthinh19011@gmail.com>
@github-actions
Copy link
Copy Markdown
Contributor

clang-tidy review says "All clean, LGTM! 👍"

Copy link
Copy Markdown
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Why is a DFF file affected by adding latch support?

Copy link
Copy Markdown
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I think it's likely because of bazel vs cmake producing slightly different routing result. The defok before was generated using cmake and it produces a different result for 8x8 which I found out while running tests so I updated it to match the bazel output. This is unrelated to the changes for the latch support

@tnguy19 tnguy19 requested a review from rovinski April 29, 2026 20:47
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

Projects

None yet

Development

Successfully merging this pull request may close these issues.

ram: Add support for latch-based memories

2 participants