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Merged
dnakhooda merged 4 commits into from
Nov 12, 2025
Merged

fixup timing #21

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e15e38c
fixup timing
jr1221 Nov 2, 2025
b2818c8
Merge branch 'main' into better-timing
jr1221 Nov 11, 2025
b892900
doesnt build
jr1221 Nov 11, 2025
7e0e334
builds
jr1221 Nov 11, 2025
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4 changes: 2 additions & 2 deletions .mxproject
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2 changes: 1 addition & 1 deletion Core/Inc/stm32h5xx_hal_conf.h
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Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_DCACHE_MODULE_ENABLED */
#define HAL_DCACHE_MODULE_ENABLED
/*#define HAL_DCMI_MODULE_ENABLED */
/*#define HAL_DTS_MODULE_ENABLED */
/*#define HAL_ETH_MODULE_ENABLED */
Expand Down
99 changes: 80 additions & 19 deletions Core/Src/main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,8 @@

/* Private variables ---------------------------------------------------------*/

DCACHE_HandleTypeDef hdcache1;

FDCAN_HandleTypeDef hfdcan2;

IWDG_HandleTypeDef hiwdg;
Expand All @@ -68,6 +70,7 @@ SPI_HandleTypeDef hspi3;

/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void PeriphCommonClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_LPUART1_UART_Init(void);
static void MX_SPI1_Init(void);
Expand All @@ -77,6 +80,7 @@ static void MX_ICACHE_Init(void);
static void MX_IWDG_Init(void);
static void MX_FDCAN2_Init(void);
static void MX_UART4_Init(void);
static void MX_DCACHE1_Init(void);
/* USER CODE BEGIN PFP */

/* USER CODE END PFP */
Expand Down Expand Up @@ -146,6 +150,9 @@ int main(void)
/* Configure the system clock */
SystemClock_Config();

/* Configure the peripherals common clocks */
PeriphCommonClock_Config();

/* USER CODE BEGIN SysInit */

/* USER CODE END SysInit */
Expand All @@ -160,6 +167,7 @@ int main(void)
MX_IWDG_Init();
MX_FDCAN2_Init();
MX_UART4_Init();
MX_DCACHE1_Init();
/* USER CODE BEGIN 2 */

/* Init Functions */
Expand Down Expand Up @@ -208,29 +216,24 @@ void SystemClock_Config(void)

/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI
|RCC_OSCILLATORTYPE_CSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV2;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
RCC_OscInitStruct.PLL.PLLM = 1;
RCC_OscInitStruct.PLL.PLLN = 32;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 2;
RCC_OscInitStruct.PLL.PLLN = 28;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 4;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_3;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
RCC_OscInitStruct.PLL.PLLFRACN = 0;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
Expand All @@ -243,20 +246,78 @@ void SystemClock_Config(void)
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|RCC_CLOCKTYPE_PCLK3;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
{
Error_Handler();
}

/** Configure the programming delay
*/
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_0);
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
}

/**
* @brief Peripherals Common Clock Configuration
* @retval None
*/
void PeriphCommonClock_Config(void)
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI1|RCC_PERIPHCLK_SPI2
|RCC_PERIPHCLK_SPI3;
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE;
PeriphClkInitStruct.PLL2.PLL2M = 5;
PeriphClkInitStruct.PLL2.PLL2N = 64;
PeriphClkInitStruct.PLL2.PLL2P = 5;
PeriphClkInitStruct.PLL2.PLL2Q = 5;
PeriphClkInitStruct.PLL2.PLL2R = 2;
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVP;
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL2P;
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL2P;
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL2P;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
}

/**
* @brief DCACHE1 Initialization Function
* @param None
* @retval None
*/
static void MX_DCACHE1_Init(void)
{

/* USER CODE BEGIN DCACHE1_Init 0 */

/* USER CODE END DCACHE1_Init 0 */

/* USER CODE BEGIN DCACHE1_Init 1 */

/* USER CODE END DCACHE1_Init 1 */
hdcache1.Instance = DCACHE1;
hdcache1.Init.ReadBurstType = DCACHE_READ_BURST_WRAP;
if (HAL_DCACHE_Init(&hdcache1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN DCACHE1_Init 2 */

/* USER CODE END DCACHE1_Init 2 */

}

/**
Expand All @@ -281,9 +342,9 @@ static void MX_FDCAN2_Init(void)
hfdcan2.Init.AutoRetransmission = DISABLE;
hfdcan2.Init.TransmitPause = DISABLE;
hfdcan2.Init.ProtocolException = DISABLE;
hfdcan2.Init.NominalPrescaler = 16;
hfdcan2.Init.NominalPrescaler = 5;
hfdcan2.Init.NominalSyncJumpWidth = 1;
hfdcan2.Init.NominalTimeSeg1 = 1;
hfdcan2.Init.NominalTimeSeg1 = 8;
hfdcan2.Init.NominalTimeSeg2 = 1;
hfdcan2.Init.DataPrescaler = 1;
hfdcan2.Init.DataSyncJumpWidth = 1;
Expand Down
78 changes: 46 additions & 32 deletions Core/Src/stm32h5xx_hal_msp.c
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Original file line number Diff line number Diff line change
Expand Up @@ -74,6 +74,51 @@ void HAL_MspInit(void)
/* USER CODE END MspInit 1 */
}

/**
* @brief DCACHE MSP Initialization
* This function configures the hardware resources used in this example
* @param hdcache: DCACHE handle pointer
* @retval None
*/
void HAL_DCACHE_MspInit(DCACHE_HandleTypeDef* hdcache)
{
if(hdcache->Instance==DCACHE1)
{
/* USER CODE BEGIN DCACHE1_MspInit 0 */

/* USER CODE END DCACHE1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_DCACHE1_CLK_ENABLE();
/* USER CODE BEGIN DCACHE1_MspInit 1 */

/* USER CODE END DCACHE1_MspInit 1 */

}

}

/**
* @brief DCACHE MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hdcache: DCACHE handle pointer
* @retval None
*/
void HAL_DCACHE_MspDeInit(DCACHE_HandleTypeDef* hdcache)
{
if(hdcache->Instance==DCACHE1)
{
/* USER CODE BEGIN DCACHE1_MspDeInit 0 */

/* USER CODE END DCACHE1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_DCACHE1_CLK_DISABLE();
/* USER CODE BEGIN DCACHE1_MspDeInit 1 */

/* USER CODE END DCACHE1_MspDeInit 1 */
}

}

/**
* @brief FDCAN MSP Initialization
* This function configures the hardware resources used in this example
Expand All @@ -93,7 +138,7 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* hfdcan)
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL1Q;
PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_HSE;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
Expand Down Expand Up @@ -288,22 +333,11 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspInit 0 */

/* USER CODE END SPI1_MspInit 0 */

/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI1;
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}

/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();

Expand Down Expand Up @@ -346,16 +380,6 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
/* USER CODE BEGIN SPI2_MspInit 0 */

/* USER CODE END SPI2_MspInit 0 */

/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI2;
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}

/* Peripheral clock enable */
__HAL_RCC_SPI2_CLK_ENABLE();

Expand Down Expand Up @@ -398,16 +422,6 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
/* USER CODE BEGIN SPI3_MspInit 0 */

/* USER CODE END SPI3_MspInit 0 */

/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI3;
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}

/* Peripheral clock enable */
__HAL_RCC_SPI3_CLK_ENABLE();

Expand Down
6 changes: 3 additions & 3 deletions Core/Src/tx_initialize_low_level.S
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Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@
/**************************************************************************/
/**************************************************************************/

SYSTEM_CLOCK = 32000000
SYSTEM_CLOCK = 175000000
SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)

/**************************************************************************/
Expand Down Expand Up @@ -262,7 +262,7 @@ __tx_DBGHandler:
EXTERN __vector_table
;
;
SYSTEM_CLOCK EQU 32000000
SYSTEM_CLOCK EQU 175000000
SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1)
;
;
Expand Down Expand Up @@ -457,7 +457,7 @@ __tx_DBGHandler:
/**************************************************************************/
/**************************************************************************/

SYSTEM_CLOCK = 32000000
SYSTEM_CLOCK = 175000000
SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)

/**************************************************************************/
Expand Down
2 changes: 1 addition & 1 deletion Drivers/Embedded-Base
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Submodule Embedded-Base updated 2 files
+105 −0 general/include/honeywellSSC.h
+133 −0 general/src/honeywellSSC.c
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