class HWEngineer:
def __init__(self):
self.name = "Gustavo Barreto"
self.role = "HW Systems Engineer"
self.location = "๐"
self.languages = ["Portuguese", "English", "French", "Spanish"]
def studies_axes(self):
return {
Studies: "Computer Architecture & Embedded Design, Digital Systems",
Research: "Hardware acceleration & reconfigurable computing",
Interests: [
"FPGA-based acceleration",
"Real-time embedded systems",
"Low-level optimization",
"Hardware/software co-design"
],
Projects: "FPGA (Quartus, Gowin), ESP32, RTOS, Linux Embedded"
}
def expertise(self):
return [
"FPGA Design (VHDL / Verilog / SystemVerilog)",
"Digital Signal Processing on hardware (DSP pipelines)",
"Embedded Systems (ARM Cortex-M, ESP32)",
"RTOS (FreeRTOS)",
"Hardware-software co-design & interface protocols (SPI, I2C, UART, CAN basics)",
"Performance embedded optimization & timing analysis"
]
def tools(self):
return {
"EDA / FPGA": ["Intel Quartus Prime", "Yosys"],
"Embedded / Build": [ "PlatformIO" ],
"Dev / Collaboration": [ "Git", "Docker"],
"Languages / Data": [ "C", "C++", "SQL"],
"Parallel / Acceleration": [ "MPI", "NVIDIA CUDA"],
}|
FPGA Development
Hardware Design
|
Reconfigurable Computing & Parallelism
Low-Level Embedded Engineering
Real-Time Systems
|

