DFSDM

.changesets/dfsdm-module-minor.md

@@ -0,0 +1,2 @@
+release: minor
+summary: Added module dfsdm tested

CMakeLists.txt

@@ -298,6 +298,7 @@ set(HALAL_CPP_NO_ETH
   ${CMAKE_CURRENT_LIST_DIR}/Src/HALAL/Services/Time/RTC.cpp
   ${CMAKE_CURRENT_LIST_DIR}/Src/HALAL/Services/Time/Scheduler.cpp
   ${CMAKE_CURRENT_LIST_DIR}/Src/HALAL/Services/Watchdog/Watchdog.cpp
+  ${CMAKE_CURRENT_LIST_DIR}/Src/HALAL/Services/DFSDM/DFSDM.cpp
 )
 
 

Inc/HALAL/HALAL.hpp

@@ -50,6 +50,8 @@
 #include "HALAL/Models/Packets/MdmaPacket.hpp"
 
 #include "HALAL/Benchmarking_toolkit/DataWatchpointTrace/DataWatchpointTrace.hpp"
+
+#include "HALAL/Services/DFSDM/DFSDM.hpp"
 #include "HALAL/HardFault/HardfaultTrace.h"
 #include "HALAL/Services/Communication/Ethernet/NewEthernet.hpp"
 #ifdef STLIB_ETH

Inc/HALAL/Models/DMA/DMA2.hpp

@@ -35,7 +35,11 @@ struct DMADomain {
         spi4,
         spi5,
         spi6,
-        fmac
+        fmac,
+        dfsdm_filter0,
+        dfsdm_filter1,
+        dfsdm_filter2,
+        dfsdm_filter3
     };
 
     enum class Stream : uint8_t {
@@ -98,7 +102,7 @@ struct DMADomain {
         }
         return nullptr;
     }
-
+    static inline consteval bool shares_dma(Peripheral p) { return is_dfsdm(p); }
     struct Entry {
         Peripheral instance;
         Stream stream;
@@ -217,6 +221,16 @@ struct DMADomain {
 
     static consteval bool is_none(Peripheral instance) { return instance == Peripheral::none; }
 
+    static consteval bool is_dfsdm(Peripheral instance) {
+        return is_one_of(
+            instance,
+            Peripheral::dfsdm_filter0,
+            Peripheral::dfsdm_filter1,
+            Peripheral::dfsdm_filter2,
+            Peripheral::dfsdm_filter3
+        );
+    }
+
     static consteval uint32_t get_Request(Peripheral instance, uint8_t i) {
         if (instance == Peripheral::none)
             return DMA_REQUEST_MEM2MEM;
@@ -272,8 +286,20 @@ struct DMADomain {
             return DMA_REQUEST_FMAC_WRITE;
         if (instance == Peripheral::fmac && i == 2)
             return DMA_REQUEST_FMAC_READ;
-
+        if (instance == Peripheral::dfsdm_filter0) {
+            return DMA_REQUEST_DFSDM1_FLT0;
+        }
+        if (instance == Peripheral::dfsdm_filter1) {
+            return DMA_REQUEST_DFSDM1_FLT1;
+        }
+        if (instance == Peripheral::dfsdm_filter2) {
+            return DMA_REQUEST_DFSDM1_FLT2;
+        }
+        if (instance == Peripheral::dfsdm_filter3) {
+            return DMA_REQUEST_DFSDM1_FLT3;
+        }
         compile_error("Invalid DMA request configuration");
+
         return 0;
     }
 
@@ -303,7 +329,7 @@ struct DMADomain {
     static consteval uint32_t get_PeriphDataAlignment(Peripheral instance, uint8_t i) {
         if (is_spi(instance) || is_i2c(instance)) {
             return DMA_PDATAALIGN_BYTE;
-        } else if (is_none(instance)) {
+        } else if (is_none(instance) || (is_dfsdm(instance))) {
             return DMA_PDATAALIGN_WORD;
         }
         return DMA_PDATAALIGN_HALFWORD;

Inc/HALAL/Models/Pin.hpp

@@ -25,8 +25,8 @@ constexpr GPIODomain::Pin PA14{A, GPIO_PIN_14, 0b1000000000000001};
 constexpr GPIODomain::Pin PA15{A, GPIO_PIN_15, 0b1100111111010011};
 
 // Port B
-constexpr GPIODomain::Pin PB0{B, GPIO_PIN_0, 0b0111110011111011};
-constexpr GPIODomain::Pin PB1{B, GPIO_PIN_1, 0b0111110011111011};
+constexpr GPIODomain::Pin PB0{B, GPIO_PIN_0, 0b0111111011111011};
+constexpr GPIODomain::Pin PB1{B, GPIO_PIN_1, 0b0111111011111011};
 constexpr GPIODomain::Pin PB2{B, GPIO_PIN_2, 0b0110111110111011};
 constexpr GPIODomain::Pin PB3{B, GPIO_PIN_3, 0b0111110110111011};
 constexpr GPIODomain::Pin PB4{B, GPIO_PIN_4, 0b0111111110110011};
@@ -35,26 +35,26 @@ constexpr GPIODomain::Pin PB6{B, GPIO_PIN_6, 0b0111110111111111};
 constexpr GPIODomain::Pin PB7{B, GPIO_PIN_7, 0b0111110111111011};
 constexpr GPIODomain::Pin PB8{B, GPIO_PIN_8, 0b0110111111111111};
 constexpr GPIODomain::Pin PB9{B, GPIO_PIN_9, 0b0110111111111111};
-constexpr GPIODomain::Pin PB10{B, GPIO_PIN_10, 0b0111110111111111};
+constexpr GPIODomain::Pin PB10{B, GPIO_PIN_10, 0b0111111111111111};
 constexpr GPIODomain::Pin PB11{B, GPIO_PIN_11, 0b0111110111111011};
-constexpr GPIODomain::Pin PB12{B, GPIO_PIN_12, 0b0111110111111011};
+constexpr GPIODomain::Pin PB12{B, GPIO_PIN_12, 0b0111111111111011};
 constexpr GPIODomain::Pin PB13{B, GPIO_PIN_13, 0b0111110111111011};
-constexpr GPIODomain::Pin PB14{B, GPIO_PIN_14, 0b0111110011111011};
+constexpr GPIODomain::Pin PB14{B, GPIO_PIN_14, 0b0111111011111011};
 constexpr GPIODomain::Pin PB15{B, GPIO_PIN_15, 0b0111110011111011};
 
 // Port C
-constexpr GPIODomain::Pin PC0{C, GPIO_PIN_0, 0b0110110110110011};
-constexpr GPIODomain::Pin PC1{C, GPIO_PIN_1, 0b0110111111111111};
+constexpr GPIODomain::Pin PC0{C, GPIO_PIN_0, 0b0110111110110011};
+constexpr GPIODomain::Pin PC1{C, GPIO_PIN_1, 0b0111111111111111};
 constexpr GPIODomain::Pin PC2{C, GPIO_PIN_2, 0b0110111110110011};
-constexpr GPIODomain::Pin PC3{C, GPIO_PIN_3, 0b0110111110110011};
+constexpr GPIODomain::Pin PC3{C, GPIO_PIN_3, 0b0111111110110011};
 constexpr GPIODomain::Pin PC4{C, GPIO_PIN_4, 0b0110110110111011};
-constexpr GPIODomain::Pin PC5{C, GPIO_PIN_5, 0b0110110110111111};
+constexpr GPIODomain::Pin PC5{C, GPIO_PIN_5, 0b0111110110111111};
 constexpr GPIODomain::Pin PC6{C, GPIO_PIN_6, 0b0111110011111111};
 constexpr GPIODomain::Pin PC7{C, GPIO_PIN_7, 0b0111110011111111};
 constexpr GPIODomain::Pin PC8{C, GPIO_PIN_8, 0b0111110011011111};
 constexpr GPIODomain::Pin PC9{C, GPIO_PIN_9, 0b0111110110111111};
 constexpr GPIODomain::Pin PC10{C, GPIO_PIN_10, 0b0110111111111111};
-constexpr GPIODomain::Pin PC11{C, GPIO_PIN_11, 0b0110111111111111};
+constexpr GPIODomain::Pin PC11{C, GPIO_PIN_11, 0b0111111111111111};
 constexpr GPIODomain::Pin PC12{C, GPIO_PIN_12, 0b0110111111011111};
 constexpr GPIODomain::Pin PC13{C, GPIO_PIN_13, 0b1000000000000001};
 constexpr GPIODomain::Pin PC14{C, GPIO_PIN_14, 0b1000000000000001};
@@ -64,14 +64,14 @@ constexpr GPIODomain::Pin PC15{C, GPIO_PIN_15, 0b1000000000000001};
 constexpr GPIODomain::Pin PD0{D, GPIO_PIN_0, 0b0111110110011011};
 constexpr GPIODomain::Pin PD1{D, GPIO_PIN_1, 0b0111110110011011};
 constexpr GPIODomain::Pin PD2{D, GPIO_PIN_2, 0b1110110110011011};
-constexpr GPIODomain::Pin PD3{D, GPIO_PIN_3, 0b0110110111110011};
+constexpr GPIODomain::Pin PD3{D, GPIO_PIN_3, 0b0111110111110011};
 constexpr GPIODomain::Pin PD4{D, GPIO_PIN_4, 0b0010110010010011};
 constexpr GPIODomain::Pin PD5{D, GPIO_PIN_5, 0b0010110010010011};
-constexpr GPIODomain::Pin PD6{D, GPIO_PIN_6, 0b0111110110111011};
-constexpr GPIODomain::Pin PD7{D, GPIO_PIN_7, 0b0110110111111011};
+constexpr GPIODomain::Pin PD6{D, GPIO_PIN_6, 0b0111111110111011};
+constexpr GPIODomain::Pin PD7{D, GPIO_PIN_7, 0b0111110111111011};
 constexpr GPIODomain::Pin PD8{D, GPIO_PIN_8, 0b0110110110010011};
-constexpr GPIODomain::Pin PD9{D, GPIO_PIN_9, 0b0110110110010011};
-constexpr GPIODomain::Pin PD10{D, GPIO_PIN_10, 0b0110110110010011};
+constexpr GPIODomain::Pin PD9{D, GPIO_PIN_9, 0b0111110110010011};
+constexpr GPIODomain::Pin PD10{D, GPIO_PIN_10, 0b0111110110010011};
 constexpr GPIODomain::Pin PD11{D, GPIO_PIN_11, 0b0111100110110011};
 constexpr GPIODomain::Pin PD12{D, GPIO_PIN_12, 0b0111110110110011};
 constexpr GPIODomain::Pin PD13{D, GPIO_PIN_13, 0b0111110110110011};
@@ -83,7 +83,7 @@ constexpr GPIODomain::Pin PE0{E, GPIO_PIN_0, 0b0111110010110011};
 constexpr GPIODomain::Pin PE1{E, GPIO_PIN_1, 0b0111110010011011};
 constexpr GPIODomain::Pin PE2{E, GPIO_PIN_2, 0b0110110111110011};
 constexpr GPIODomain::Pin PE3{E, GPIO_PIN_3, 0b0110110111110011};
-constexpr GPIODomain::Pin PE4{E, GPIO_PIN_4, 0b0110110111111111};
+constexpr GPIODomain::Pin PE4{E, GPIO_PIN_4, 0b0111110111111111};
 constexpr GPIODomain::Pin PE5{E, GPIO_PIN_5, 0b0110110111111011};
 constexpr GPIODomain::Pin PE6{E, GPIO_PIN_6, 0b0110110111111111};
 constexpr GPIODomain::Pin PE7{E, GPIO_PIN_7, 0b0111110010010011};
@@ -110,7 +110,7 @@ constexpr GPIODomain::Pin PF9{F, GPIO_PIN_9, 0b0111110010111011};
 constexpr GPIODomain::Pin PF10{F, GPIO_PIN_10, 0b0110110010110011};
 constexpr GPIODomain::Pin PF11{F, GPIO_PIN_11, 0b0010110010010011};
 constexpr GPIODomain::Pin PF12{F, GPIO_PIN_12, 0b0010010010010011};
-constexpr GPIODomain::Pin PF13{F, GPIO_PIN_13, 0b0110110010110011};
+constexpr GPIODomain::Pin PF13{F, GPIO_PIN_13, 0b0111110010110011};
 constexpr GPIODomain::Pin PF14{F, GPIO_PIN_14, 0b0110110010110011};
 constexpr GPIODomain::Pin PF15{F, GPIO_PIN_15, 0b0010110010010011};
 

Inc/HALAL/Models/TimerDomain/TimerDomain.hpp

@@ -136,6 +136,32 @@ TimerXList
         Basic_6 = 6,
         Basic_7 = 7,
     };
+    enum class SelectionTrigger1 : uint32_t {
+        Reset = TIM_TRGO_RESET,
+        Enable = TIM_TRGO_ENABLE,
+        Update = TIM_TRGO_UPDATE,
+        General_Compare = TIM_TRGO_OC1,
+        Compare_channel1 = TIM_TRGO_OC1REF,
+        Compare_channel2 = TIM_TRGO_OC2REF,
+        Compare_channel3 = TIM_TRGO_OC3REF,
+        Compare_channel4 = TIM_TRGO_OC4REF
+    };
+    enum class SelectionTrigger2 : uint32_t {
+        Reset = TIM_TRGO2_RESET,
+        Enable = TIM_TRGO2_ENABLE,
+        Update = TIM_TRGO2_UPDATE,
+        General_Compare = TIM_TRGO2_OC1,
+        Compare_channel1 = TIM_TRGO2_OC1REF,
+        Compare_channel2 = TIM_TRGO2_OC2REF,
+        Compare_channel3 = TIM_TRGO2_OC3REF,
+        Compare_channel4 = TIM_TRGO2_OC4REF,
+        Compare_channel5 = TIM_TRGO2_OC5REF,
+        Compare_channel6 = TIM_TRGO2_OC6REF,
+        Compare_channel4_R_channel6_F = TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING,
+        Compare_channel4_R_channel6_R = TIM_TRGO2_OC4REF_RISING_OC6REF_RISING,
+        Compare_channel5_R_channel6_F = TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING,
+        Compare_channel5_R_channel6_R = TIM_TRGO2_OC5REF_RISING_OC6REF_RISING
+    };
 
     // Alternate functions for timers
     enum class TimerAF {
@@ -231,10 +257,14 @@ TimerXList
             TimerRequest request;
             uint8_t pin_count;
             std::array<TimerPin, 7> pins; /* this won't be read in Timer constructor */
+            SelectionTrigger1 trgo1{SelectionTrigger1::Reset};
+            SelectionTrigger2 trgo2{SelectionTrigger2::Reset};
         };
 
         struct Config {
             uint8_t timer_idx;
+            SelectionTrigger1 trgo1;
+            SelectionTrigger2 trgo2;
         };
 
         static constexpr TIM_HandleTypeDef* hal_handles[16] = {// general purpose timers
@@ -468,15 +498,17 @@ TimerXList
                 : e(ent.name,
                     ent.request,
                     sizeof...(pinargs),
-                    std::array<TimerPin, 7>(
-                        {GetPinFromIdx(pinargs, 0),
-                         GetPinFromIdx(pinargs, 1),
-                         GetPinFromIdx(pinargs, 2),
-                         GetPinFromIdx(pinargs, 3),
-                         GetPinFromIdx(pinargs, 4),
-                         GetPinFromIdx(pinargs, 5),
-                         GetPinFromIdx(pinargs, 6)}
-                    )),
+                    std::array<TimerPin, 7>({
+                        GetPinFromIdx(pinargs, 0),
+                        GetPinFromIdx(pinargs, 1),
+                        GetPinFromIdx(pinargs, 2),
+                        GetPinFromIdx(pinargs, 3),
+                        GetPinFromIdx(pinargs, 4),
+                        GetPinFromIdx(pinargs, 5),
+                        GetPinFromIdx(pinargs, 6),
+                    }),
+                    ent.trgo1,
+                    ent.trgo2),
                   gpio0(GetGPIOFromIdx(pinargs, ent.request, 0)),
                   gpio1(GetGPIOFromIdx(pinargs, ent.request, 1)),
                   gpio2(GetGPIOFromIdx(pinargs, ent.request, 2)),
@@ -521,6 +553,8 @@ TimerXList
                     .request = e.request,
                     .pin_count = e.pin_count,
                     .pins = e.pins,
+                    .trgo1 = e.trgo1,
+                    .trgo2 = e.trgo2
                 };
                 ctx.template add<TimerDomain>(local_entry, this);
             }
@@ -575,6 +609,8 @@ TimerXList
 
                     Config cfg = {
                         .timer_idx = timer_idxmap[reqint],
+                        .trgo1 = requests[i].trgo1,
+                        .trgo2 = requests[i].trgo2
                     };
                     cfgs[cfg_idx++] = cfg;
 
@@ -607,6 +643,8 @@ TimerXList
                     uint8_t reqint = remaining_32bit_timers[count_32bit_requests];
                     Config cfg = {
                         .timer_idx = timer_idxmap[reqint],
+                        .trgo1 = requests[i].trgo1,
+                        .trgo2 = requests[i].trgo2
                     };
                     cfgs[cfg_idx++] = cfg;
 
@@ -656,6 +694,8 @@ TimerXList
                 uint8_t reqint = remaining_timers[i];
                 Config cfg = {
                     .timer_idx = timer_idxmap[reqint],
+                    .trgo1 = requests[i].trgo1,
+                    .trgo2 = requests[i].trgo2
                 };
                 cfgs[cfg_idx++] = cfg;
             }
@@ -667,6 +707,7 @@ TimerXList
         struct Instance {
             TIM_TypeDef* tim;
             TIM_HandleTypeDef* hal_tim;
+            TIM_MasterConfigTypeDef master{};
             uint8_t timer_idx;
         };
 
@@ -688,6 +729,7 @@ TimerXList
 
                     TIM_HandleTypeDef* handle = hal_handles[e.timer_idx];
                     TIM_TypeDef* tim = cmsis_timers[e.timer_idx];
+
                     handle->Instance = tim;
                     handle->Init.Period = 0;
                     handle->Init.Prescaler = 0;
@@ -717,6 +759,15 @@ TimerXList
                     inst->tim = tim;
                     inst->hal_tim = handle;
                     inst->timer_idx = e.timer_idx;
+                    TIM_MasterConfigTypeDef sMasterConfig = {};
+                    sMasterConfig.MasterOutputTrigger = static_cast<uint32_t>(e.trgo1);
+                    sMasterConfig.MasterOutputTrigger2 = static_cast<uint32_t>(e.trgo2);
+                    sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+                    inst->master = sMasterConfig;
+                    if (HAL_TIMEx_MasterConfigSynchronization(inst->hal_tim, &sMasterConfig) !=
+                        HAL_OK) {
+                        ErrorHandler("Unable to configure master synch");
+                    }
                 }
             }
         };

Inc/HALAL/Services/ADC/ADC.hpp

@@ -189,15 +189,7 @@ struct ADCDomain {
             ClockPrescaler prescaler = ClockPrescaler::DIV1,
             uint32_t sample_rate_hz = 0
         )
-            : ADC(
-                  pin,
-                  resolution,
-                  sample_time,
-                  prescaler,
-                  sample_rate_hz,
-                  peripheral,
-                  channel
-              ) {}
+            : ADC(pin, resolution, sample_time, prescaler, sample_rate_hz, peripheral, channel) {}
 
         template <class Ctx> consteval std::size_t inscribe(Ctx& ctx) const {
             const auto gpio_idx = gpio.inscribe(ctx);