Bugfixes and Makefile

.gitignore

@@ -1,8 +1,9 @@
 .vscode
 assembler/assembler
 sim
+nandcomp
 *.obj
 *.exe
 *.src
 *.bit
-!macros.src
+!macros.src

Makefile

@@ -0,0 +1,20 @@
+CC = g++
+CPPFLAGS += -I .
+
+SOURCES = $(wildcard *.cpp)
+
+all: nandcomp assembler/assembler sim
+
+debug: CXXFLAGS += -g
+debug: clean all
+
+nandcomp: $(SOURCES)
+	$(CC) $(CXXFLAGS) $(CPPFLAGS) $^ -o $@
+
+assembler/assembler: assembler/assembler.cpp misc.cpp
+
+sim: CC = cc
+sim: sim.c
+
+clean:
+	rm nandcomp assembler/assembler sim || :

README.md

@@ -53,7 +53,7 @@ A = A + $F$
 - An additional instruction that does not exist within NandGame, "MACH", has been added, similar to the C instruction, "ASM", can be used to insert code in a lower level programming language, in this case, machine code.
 	- It takes a single argument, a number (either decimal, binary or hexadecimal) which will be inserted as an instruction.
 - The "SIM" macro (defined in macros.src) interacts with the advanced simulator (see below), it takes one or more parameters, which are:
-	- CLRS (Clear screen), DUMP (Dump the registers, current instruction, and memory value at A, either if a jump is about to be or has just been perormed), "HOLD" (Wait for user keypress before continuing) and "STOP" (Stop the simulator).
+	- CLRS (Clear screen), DUMP (Dump the registers, current instruction, and memory value at A, either if a jump is about to be or has just been performed), "HOLD" (Wait for user keypress before continuing) and "STOP" (Stop the simulator).
 		- The parameters will run in the order in which they're mentioned above.
 - The preprocessor will evaluate the contents of basic arithmeticological operations (~ (or !) * / % + - & ^ (XOR) |) inside of ",()" according to the order of operations. E.g. `A = ,(4 | (5 + 1) / 2)` will be evaluated to `A = 7`.
 	- The preprocessor will work with numbers with up to 32 bits, but keep in mind that the the maximum number in a "A = num" instruction has 15 bits.

assembler/assembler.cpp

@@ -1123,38 +1123,40 @@ class CodeGenerator {
 			So, if you can't make sense of it, that's why.
 			*/
 
-			switch (twork[0]) {
-				case Tokens::A:
-					debug_log("A is first opperand");
-					if (twork.size() != 1) {
-						debug_log(" A swap has been performed");
-						work.b[SW] = 1;
-					}
-					break;
-
-				case Tokens::Minus:
-					debug_log("The operator is minus");
-						work.b[ZX] = 1;
-						work.b[OP1] = 1;
-						if (twork.size() > 1) {
-							if (twork[1] == Tokens::D)
-								work.b[SW] = 1;
-							if (twork.size() == 2 && num != 1)
-								work.b[U] = 1;
+			if (twork.size() > 1) {
+				switch (twork[0]) {
+					case Tokens::A:
+						debug_log("A is first opperand");
+						if (twork.size() != 1) {
+							debug_log(" A swap has been performed");
+							work.b[SW] = 1;
 						}
-					break;
+						break;
+
+					case Tokens::Minus:
+						debug_log("The operator is minus");
+							work.b[ZX] = 1;
+							work.b[OP1] = 1;
+							if (twork.size() > 1) {
+								if (twork[1] == Tokens::D)
+									work.b[SW] = 1;
+								if (twork.size() == 2 && num != 1)
+									work.b[U] = 1;
+							}
+						break;
 
-				case Tokens::Tilde:
-					debug_log("The operator is tilde, invert");
-					work.b[OP0] = 1;
-					work.b[OP1] = 1;
-					if (twork.size() > 1)
-						if (twork[1] == Tokens::A)
-							work.b[SW] = 1;
-					break;
-
-				default:
-					break;
+					case Tokens::Tilde:
+						debug_log("The operator is tilde, invert");
+						work.b[OP0] = 1;
+						work.b[OP1] = 1;
+						if (twork.size() > 1)
+							if (twork[1] == Tokens::A)
+								work.b[SW] = 1;
+						break;
+
+					default:
+						break;
+				}
 			}
 
 			if (twork.size() == 1) {
@@ -1167,7 +1169,7 @@ class CodeGenerator {
 				} else if (num != 0) {
 					work.b[U] = 1;
 				}
-			} else {
+			} else if (twork.size() > 1) {
 				switch (twork[1]) {
 					case Tokens::Or:
 						debug_log("The operator is or");
@@ -1728,4 +1730,4 @@ int main(int argc, char **argv) {
 	code.close();
 
 	return 0;
-}
+}

processor.cpp

@@ -33,13 +33,13 @@ namespace PROCESSOR {
     DecodedInstruction decodeInstruction(WORD I) {
         DecodedInstruction di;
         BitArr<16> work = decomposeWord(I);
-        di.W = select16(work.b[CI], I, 0x0000000000000000);
-        work = decomposeWord(select16(work.b[CI], 0x0000000000100000, I));
+        di.W = select16(work.b[CI], I, 0b0000000000000000);
+        work = decomposeWord(select16(work.b[CI], 0b0000000000100000, I));
         di.computation = work.b[CI];
         di.source = work.b[SM];
         di.operation = {work.b[U], work.b[OP1], work.b[OP0], work.b[ZX], work.b[SW]};
         di.destination.b[2] = work.b[AM]; di.destination.b[1] = work.b[D]; di.destination.b[0] = OR(work.b[A], NOT(work.b[CI]));
         di.condition = {work.b[LT], work.b[EQ], work.b[GT]};
         return di;
     };
-}
+}

processor.hpp

@@ -1,6 +1,7 @@
 #pragma once
 #include "alu.hpp"
 #include "memory.hpp"
+#include "misc.hpp"
 
 using namespace BITMAN;
 
@@ -38,4 +39,4 @@ namespace PROCESSOR {
         public:
             ProcessResult process(WORD I);
     };
-}
+}