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perf(compiler): merge linear memory prechecks for direct-memory recur…#436

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ECNUyhy wants to merge 2 commits intoDTVMStack:mainfrom
ECNUyhy:memory-perf1
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perf(compiler): merge linear memory prechecks for direct-memory recur…#436
ECNUyhy wants to merge 2 commits intoDTVMStack:mainfrom
ECNUyhy:memory-perf1

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@ECNUyhy ECNUyhy commented Mar 28, 2026

…rences

1. Does this PR affect any open issues?(Y/N) and add issue references (e.g. "fix #123", "re #123".):

  • N
  • Y

2. What is the scope of this PR (e.g. component or file name):

3. Provide a description of the PR(e.g. more details, effects, motivations or doc link):

  • Affects user behaviors
  • Contains CI/CD configuration changes
  • Contains documentation changes
  • Contains experimental features
  • Performance regression: Consumes more CPU
  • Performance regression: Consumes more Memory
  • Other

4. Are there any breaking changes?(Y/N) and describe the breaking changes(e.g. more details, motivations or doc link):

  • N
  • Y

5. Are there test cases for these changes?(Y/N) select and add more details, references or doc links:

  • Unit test
  • Integration test
  • Benchmark (add benchmark stats below)
  • Manual test (add detailed scripts or steps below)
  • Other

6. Release note

None

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github-actions bot commented Mar 28, 2026

⚡ Performance Regression Check Results

✅ Performance Check Passed (interpreter)

Performance Benchmark Results (threshold: 25%)

Benchmark Baseline (us) Current (us) Change Status
total/main/blake2b_huff/8415nulls 1.49 1.54 +3.5% PASS
total/main/blake2b_huff/empty 0.02 0.02 +0.6% PASS
total/main/blake2b_shifts/8415nulls 12.02 11.87 -1.2% PASS
total/main/sha1_divs/5311 5.21 5.10 -2.2% PASS
total/main/sha1_divs/empty 0.06 0.06 -1.8% PASS
total/main/sha1_shifts/5311 2.95 2.94 -0.5% PASS
total/main/sha1_shifts/empty 0.04 0.04 -0.6% PASS
total/main/snailtracer/benchmark 52.99 52.56 -0.8% PASS
total/main/structarray_alloc/nfts_rank 1.03 0.97 -5.5% PASS
total/main/swap_math/insufficient_liquidity 0.00 0.00 -10.8% PASS
total/main/swap_math/received 0.01 0.00 -7.2% PASS
total/main/swap_math/spent 0.00 0.00 -9.5% PASS
total/main/weierstrudel/1 0.29 0.28 -3.0% PASS
total/main/weierstrudel/15 3.16 3.13 -0.6% PASS
total/micro/JUMPDEST_n0/empty 1.31 1.35 +3.0% PASS
total/micro/jump_around/empty 0.09 0.09 +1.7% PASS
total/micro/loop_with_many_jumpdests/empty 19.93 20.05 +0.6% PASS
total/micro/memory_grow_mload/by1 0.09 0.10 +3.6% PASS
total/micro/memory_grow_mload/by16 0.10 0.10 +1.6% PASS
total/micro/memory_grow_mload/by32 0.11 0.11 -4.0% PASS
total/micro/memory_grow_mload/nogrow 0.09 0.10 +14.6% PASS
total/micro/memory_grow_mstore/by1 0.09 0.10 +5.9% PASS
total/micro/memory_grow_mstore/by16 0.11 0.11 +1.0% PASS
total/micro/memory_grow_mstore/by32 0.12 0.12 -4.5% PASS
total/micro/memory_grow_mstore/nogrow 0.09 0.10 +8.8% PASS
total/micro/signextend/one 0.23 0.23 -1.3% PASS
total/micro/signextend/zero 0.24 0.23 -1.7% PASS
total/synth/ADD/b0 2.02 2.00 -1.4% PASS
total/synth/ADD/b1 1.97 2.00 +1.2% PASS
total/synth/ADDRESS/a0 4.81 4.77 -1.0% PASS
total/synth/ADDRESS/a1 5.38 5.31 -1.5% PASS
total/synth/AND/b0 1.63 1.71 +4.8% PASS
total/synth/AND/b1 1.71 1.71 +0.0% PASS
total/synth/BYTE/b0 6.09 6.12 +0.6% PASS
total/synth/BYTE/b1 4.75 4.74 -0.2% PASS
total/synth/CALLDATASIZE/a0 3.34 3.58 +7.3% PASS
total/synth/CALLDATASIZE/a1 4.11 3.73 -9.1% PASS
total/synth/CALLER/a0 4.86 4.74 -2.6% PASS
total/synth/CALLER/a1 5.32 5.30 -0.3% PASS
total/synth/CALLVALUE/a0 3.26 3.76 +15.3% PASS
total/synth/CALLVALUE/a1 3.60 3.76 +4.5% PASS
total/synth/CODESIZE/a0 3.51 3.99 +13.8% PASS
total/synth/CODESIZE/a1 3.84 4.00 +4.3% PASS
total/synth/DUP1/d0 1.23 1.23 -0.2% PASS
total/synth/DUP1/d1 1.32 1.39 +5.9% PASS
total/synth/DUP10/d0 1.23 1.15 -6.7% PASS
total/synth/DUP10/d1 1.32 1.39 +5.9% PASS
total/synth/DUP11/d0 1.31 1.15 -12.3% PASS
total/synth/DUP11/d1 1.32 1.39 +6.0% PASS
total/synth/DUP12/d0 1.23 1.15 -7.1% PASS
total/synth/DUP12/d1 1.14 1.39 +22.1% PASS
total/synth/DUP13/d0 1.23 1.38 +12.6% PASS
total/synth/DUP13/d1 1.08 1.15 +7.1% PASS
total/synth/DUP14/d0 1.23 1.31 +6.3% PASS
total/synth/DUP14/d1 1.31 1.16 -12.0% PASS
total/synth/DUP15/d0 1.31 1.15 -12.2% PASS
total/synth/DUP15/d1 1.31 1.16 -11.9% PASS
total/synth/DUP16/d0 1.23 1.15 -6.4% PASS
total/synth/DUP16/d1 1.32 1.39 +5.9% PASS
total/synth/DUP2/d0 1.06 1.14 +7.5% PASS
total/synth/DUP2/d1 1.32 1.15 -12.5% PASS
total/synth/DUP3/d0 0.99 1.14 +15.8% PASS
total/synth/DUP3/d1 1.07 1.39 +29.6% PASS
total/synth/DUP4/d0 1.23 1.22 -0.5% PASS
total/synth/DUP4/d1 1.31 1.39 +6.0% PASS
total/synth/DUP5/d0 1.23 1.15 -7.2% PASS
total/synth/DUP5/d1 1.31 1.39 +6.0% PASS
total/synth/DUP6/d0 1.23 1.07 -12.5% PASS
total/synth/DUP6/d1 1.08 1.39 +29.2% PASS
total/synth/DUP7/d0 1.31 1.07 -18.4% PASS
total/synth/DUP7/d1 1.31 1.39 +5.9% PASS
total/synth/DUP8/d0 1.23 1.31 +6.3% PASS
total/synth/DUP8/d1 1.08 1.39 +29.3% PASS
total/synth/DUP9/d0 1.07 1.15 +6.9% PASS
total/synth/DUP9/d1 1.08 1.15 +7.0% PASS
total/synth/EQ/b0 2.70 2.76 +2.4% PASS
total/synth/EQ/b1 1.31 1.33 +1.2% PASS
total/synth/GAS/a0 3.75 3.83 +2.1% PASS
total/synth/GAS/a1 3.76 3.84 +2.2% PASS
total/synth/GT/b0 2.59 2.61 +1.0% PASS
total/synth/GT/b1 1.48 1.56 +5.4% PASS
total/synth/ISZERO/u0 1.14 1.15 +0.5% PASS
total/synth/JUMPDEST/n0 1.31 1.31 +0.1% PASS
total/synth/LT/b0 2.60 2.62 +0.9% PASS
total/synth/LT/b1 1.48 1.56 +5.7% PASS
total/synth/MSIZE/a0 4.28 4.26 -0.5% PASS
total/synth/MSIZE/a1 4.73 4.81 +1.6% PASS
total/synth/MUL/b0 5.30 5.30 +0.0% PASS
total/synth/MUL/b1 5.29 5.37 +1.4% PASS
total/synth/NOT/u0 1.67 1.83 +9.8% PASS
total/synth/OR/b0 1.64 1.65 +0.6% PASS
total/synth/OR/b1 1.71 1.71 +0.1% PASS
total/synth/PC/a0 3.26 3.58 +10.1% PASS
total/synth/PC/a1 3.52 3.51 -0.2% PASS
total/synth/PUSH1/p0 1.23 1.15 -6.5% PASS
total/synth/PUSH1/p1 1.31 1.39 +6.5% PASS
total/synth/PUSH10/p0 0.99 1.07 +7.8% PASS
total/synth/PUSH10/p1 1.33 1.41 +6.2% PASS
total/synth/PUSH11/p0 0.99 0.98 -1.0% PASS
total/synth/PUSH11/p1 1.31 1.42 +7.8% PASS
total/synth/PUSH12/p0 0.99 1.15 +16.1% PASS
total/synth/PUSH12/p1 1.32 1.44 +9.5% PASS
total/synth/PUSH13/p0 1.15 0.91 -20.9% PASS
total/synth/PUSH13/p1 1.31 1.41 +7.6% PASS
total/synth/PUSH14/p0 0.93 1.16 +25.6% PASS
total/synth/PUSH14/p1 1.32 1.41 +7.2% PASS
total/synth/PUSH15/p0 0.99 1.07 +7.7% PASS
total/synth/PUSH15/p1 1.37 1.47 +6.8% PASS
total/synth/PUSH16/p0 0.99 0.99 -0.5% PASS
total/synth/PUSH16/p1 1.32 1.42 +7.7% PASS
total/synth/PUSH17/p0 0.99 0.91 -8.1% PASS
total/synth/PUSH17/p1 1.31 1.42 +7.9% PASS
total/synth/PUSH18/p0 1.02 1.07 +4.9% PASS
total/synth/PUSH18/p1 1.31 1.42 +7.8% PASS
total/synth/PUSH19/p0 0.99 0.91 -8.3% PASS
total/synth/PUSH19/p1 1.32 1.42 +7.5% PASS
total/synth/PUSH2/p0 0.99 1.15 +16.1% PASS
total/synth/PUSH2/p1 1.31 1.40 +6.7% PASS
total/synth/PUSH20/p0 1.15 1.07 -7.5% PASS
total/synth/PUSH20/p1 1.31 1.45 +10.1% PASS
total/synth/PUSH21/p0 1.15 0.91 -20.8% PASS
total/synth/PUSH21/p1 1.31 1.42 +7.8% PASS
total/synth/PUSH22/p0 1.15 0.91 -21.2% PASS
total/synth/PUSH22/p1 1.32 1.42 +7.7% PASS
total/synth/PUSH23/p0 1.23 0.91 -26.3% PASS
total/synth/PUSH23/p1 1.32 1.43 +8.0% PASS
total/synth/PUSH24/p0 1.23 0.93 -24.7% PASS
total/synth/PUSH24/p1 1.33 1.42 +7.2% PASS
total/synth/PUSH25/p0 0.99 1.13 +14.2% PASS
total/synth/PUSH25/p1 1.32 1.42 +7.2% PASS
total/synth/PUSH26/p0 0.91 1.07 +17.0% PASS
total/synth/PUSH26/p1 1.32 1.42 +8.1% PASS
total/synth/PUSH27/p0 1.23 1.15 -6.5% PASS
total/synth/PUSH27/p1 1.33 1.43 +6.9% PASS
total/synth/PUSH28/p0 0.99 1.07 +7.5% PASS
total/synth/PUSH28/p1 1.34 1.45 +8.2% PASS
total/synth/PUSH29/p0 0.99 1.07 +7.9% PASS
total/synth/PUSH29/p1 1.31 1.42 +8.3% PASS
total/synth/PUSH3/p0 1.15 0.91 -20.8% PASS
total/synth/PUSH3/p1 1.31 1.41 +7.4% PASS
total/synth/PUSH30/p0 1.16 1.16 +0.1% PASS
total/synth/PUSH30/p1 1.31 1.44 +10.4% PASS
total/synth/PUSH31/p0 0.99 1.15 +15.8% PASS
total/synth/PUSH31/p1 1.41 1.54 +9.2% PASS
total/synth/PUSH32/p0 0.99 1.07 +7.9% PASS
total/synth/PUSH32/p1 1.32 1.43 +8.4% PASS
total/synth/PUSH4/p0 0.99 0.91 -8.3% PASS
total/synth/PUSH4/p1 1.32 1.42 +7.5% PASS
total/synth/PUSH5/p0 0.99 1.15 +15.8% PASS
total/synth/PUSH5/p1 1.31 1.44 +10.1% PASS
total/synth/PUSH6/p0 0.99 1.07 +8.0% PASS
total/synth/PUSH6/p1 1.31 1.41 +7.8% PASS
total/synth/PUSH7/p0 1.23 0.91 -26.1% PASS
total/synth/PUSH7/p1 1.32 1.42 +7.4% PASS
total/synth/PUSH8/p0 0.91 1.07 +17.7% PASS
total/synth/PUSH8/p1 1.31 1.44 +10.1% PASS
total/synth/PUSH9/p0 0.99 1.15 +15.7% PASS
total/synth/PUSH9/p1 1.31 1.42 +8.4% PASS
total/synth/RETURNDATASIZE/a0 3.43 3.99 +16.4% PASS
total/synth/RETURNDATASIZE/a1 3.76 4.00 +6.4% PASS
total/synth/SAR/b0 3.78 3.83 +1.4% PASS
total/synth/SAR/b1 4.30 4.31 +0.1% PASS
total/synth/SGT/b0 2.61 2.61 +0.1% PASS
total/synth/SGT/b1 1.56 1.56 -0.0% PASS
total/synth/SHL/b0 3.03 3.06 +0.7% PASS
total/synth/SHL/b1 1.68 1.63 -2.9% PASS
total/synth/SHR/b0 3.10 2.95 -4.9% PASS
total/synth/SHR/b1 1.55 1.60 +3.2% PASS
total/synth/SIGNEXTEND/b0 3.18 3.67 +15.2% PASS
total/synth/SIGNEXTEND/b1 3.43 3.74 +8.8% PASS
total/synth/SLT/b0 2.60 2.62 +0.6% PASS
total/synth/SLT/b1 1.55 1.56 +0.2% PASS
total/synth/SUB/b0 1.95 1.98 +1.8% PASS
total/synth/SUB/b1 1.97 1.96 -0.5% PASS
total/synth/SWAP1/s0 1.50 1.49 -0.9% PASS
total/synth/SWAP10/s0 1.52 1.50 -1.1% PASS
total/synth/SWAP11/s0 1.52 1.50 -1.3% PASS
total/synth/SWAP12/s0 1.52 1.51 -1.0% PASS
total/synth/SWAP13/s0 1.52 1.55 +1.7% PASS
total/synth/SWAP14/s0 1.53 1.53 -0.1% PASS
total/synth/SWAP15/s0 1.52 1.51 -1.0% PASS
total/synth/SWAP16/s0 1.53 1.51 -1.2% PASS
total/synth/SWAP2/s0 1.50 1.49 -0.8% PASS
total/synth/SWAP3/s0 1.50 1.50 -0.5% PASS
total/synth/SWAP4/s0 1.50 1.50 -0.5% PASS
total/synth/SWAP5/s0 1.51 1.50 -0.7% PASS
total/synth/SWAP6/s0 1.51 1.50 -0.6% PASS
total/synth/SWAP7/s0 1.51 1.50 -1.1% PASS
total/synth/SWAP8/s0 1.52 1.50 -1.1% PASS
total/synth/SWAP9/s0 1.52 1.50 -1.0% PASS
total/synth/XOR/b0 1.55 1.55 -0.1% PASS
total/synth/XOR/b1 1.55 1.55 +0.2% PASS
total/synth/loop_v1 4.64 4.56 -1.8% PASS
total/synth/loop_v2 4.76 4.32 -9.3% PASS

Summary: 194 benchmarks, 0 regressions


✅ Performance Check Passed (multipass)

Performance Benchmark Results (threshold: 25%)

Benchmark Baseline (us) Current (us) Change Status
total/main/blake2b_huff/8415nulls 1.54 1.55 +0.4% PASS
total/main/blake2b_huff/empty 0.07 0.07 -8.5% PASS
total/main/blake2b_shifts/8415nulls 5.19 5.29 +1.8% PASS
total/main/sha1_divs/5311 1.89 1.89 +0.1% PASS
total/main/sha1_divs/empty 0.03 0.03 -0.9% PASS
total/main/sha1_shifts/5311 2.76 2.76 +0.0% PASS
total/main/sha1_shifts/empty 0.04 0.04 -1.1% PASS
total/main/snailtracer/benchmark 53.37 53.54 +0.3% PASS
total/main/structarray_alloc/nfts_rank 0.29 0.29 +0.1% PASS
total/main/swap_math/insufficient_liquidity 0.02 0.02 -4.6% PASS
total/main/swap_math/received 0.02 0.02 -4.8% PASS
total/main/swap_math/spent 0.02 0.02 -4.3% PASS
total/main/weierstrudel/1 0.36 0.35 -3.8% PASS
total/main/weierstrudel/15 3.24 3.21 -0.9% PASS
total/micro/JUMPDEST_n0/empty 0.13 0.13 +0.6% PASS
total/micro/jump_around/empty 0.63 0.64 +1.0% PASS
total/micro/loop_with_many_jumpdests/empty 1.97 1.98 +0.5% PASS
total/micro/memory_grow_mload/by1 0.20 0.18 -7.7% PASS
total/micro/memory_grow_mload/by16 0.21 0.19 -8.6% PASS
total/micro/memory_grow_mload/by32 0.22 0.20 -7.9% PASS
total/micro/memory_grow_mload/nogrow 0.19 0.17 -8.1% PASS
total/micro/memory_grow_mstore/by1 0.20 0.18 -7.6% PASS
total/micro/memory_grow_mstore/by16 0.21 0.20 -7.1% PASS
total/micro/memory_grow_mstore/by32 0.22 0.21 -6.5% PASS
total/micro/memory_grow_mstore/nogrow 0.19 0.18 -7.5% PASS
total/micro/signextend/one 0.35 0.34 -3.0% PASS
total/micro/signextend/zero 0.35 0.35 -1.4% PASS
total/synth/ADD/b0 0.01 0.01 -10.4% PASS
total/synth/ADD/b1 0.01 0.01 -9.7% PASS
total/synth/ADDRESS/a0 0.16 0.16 -1.3% PASS
total/synth/ADDRESS/a1 0.16 0.16 -1.0% PASS
total/synth/AND/b0 0.01 0.01 -10.4% PASS
total/synth/AND/b1 0.01 0.01 -9.5% PASS
total/synth/BYTE/b0 1.96 1.95 -0.0% PASS
total/synth/BYTE/b1 2.34 2.33 -0.5% PASS
total/synth/CALLDATASIZE/a0 0.08 0.08 +1.5% PASS
total/synth/CALLDATASIZE/a1 0.08 0.08 +1.3% PASS
total/synth/CALLER/a0 0.16 0.16 -0.8% PASS
total/synth/CALLER/a1 0.16 0.16 -1.0% PASS
total/synth/CALLVALUE/a0 0.28 0.28 -0.2% PASS
total/synth/CALLVALUE/a1 0.28 0.28 -0.3% PASS
total/synth/CODESIZE/a0 0.08 0.08 -1.6% PASS
total/synth/CODESIZE/a1 0.08 0.08 -1.9% PASS
total/synth/DUP1/d0 0.01 0.01 -10.2% PASS
total/synth/DUP1/d1 0.01 0.01 -9.4% PASS
total/synth/DUP10/d0 0.01 0.01 -10.4% PASS
total/synth/DUP10/d1 0.01 0.01 -9.2% PASS
total/synth/DUP11/d0 0.01 0.01 -10.4% PASS
total/synth/DUP11/d1 0.01 0.01 -9.5% PASS
total/synth/DUP12/d0 0.01 0.01 -10.5% PASS
total/synth/DUP12/d1 0.01 0.01 -9.5% PASS
total/synth/DUP13/d0 0.01 0.01 -10.3% PASS
total/synth/DUP13/d1 0.01 0.01 -9.5% PASS
total/synth/DUP14/d0 0.01 0.01 -10.4% PASS
total/synth/DUP14/d1 0.01 0.01 -9.5% PASS
total/synth/DUP15/d0 0.01 0.01 -10.2% PASS
total/synth/DUP15/d1 0.01 0.01 -9.5% PASS
total/synth/DUP16/d0 0.01 0.01 -10.3% PASS
total/synth/DUP16/d1 0.01 0.01 -9.5% PASS
total/synth/DUP2/d0 0.01 0.01 -10.3% PASS
total/synth/DUP2/d1 0.01 0.01 -9.4% PASS
total/synth/DUP3/d0 0.01 0.01 -10.4% PASS
total/synth/DUP3/d1 0.01 0.01 -9.5% PASS
total/synth/DUP4/d0 0.01 0.01 -10.3% PASS
total/synth/DUP4/d1 0.01 0.01 -9.5% PASS
total/synth/DUP5/d0 0.01 0.01 -10.3% PASS
total/synth/DUP5/d1 0.01 0.01 -9.4% PASS
total/synth/DUP6/d0 0.01 0.01 -10.4% PASS
total/synth/DUP6/d1 0.01 0.01 -9.2% PASS
total/synth/DUP7/d0 0.01 0.01 -10.4% PASS
total/synth/DUP7/d1 0.01 0.01 -9.4% PASS
total/synth/DUP8/d0 0.01 0.01 -10.3% PASS
total/synth/DUP8/d1 0.01 0.01 -9.3% PASS
total/synth/DUP9/d0 0.01 0.01 -10.5% PASS
total/synth/DUP9/d1 0.01 0.01 -9.4% PASS
total/synth/EQ/b0 0.01 0.01 -10.3% PASS
total/synth/EQ/b1 0.01 0.01 -9.6% PASS
total/synth/GAS/a0 0.80 0.80 -0.3% PASS
total/synth/GAS/a1 0.77 0.76 -0.4% PASS
total/synth/GT/b0 0.01 0.01 -10.3% PASS
total/synth/GT/b1 0.01 0.01 -9.6% PASS
total/synth/ISZERO/u0 0.01 0.01 -10.6% PASS
total/synth/JUMPDEST/n0 0.13 0.14 +1.5% PASS
total/synth/LT/b0 0.01 0.01 -10.3% PASS
total/synth/LT/b1 0.01 0.01 -9.5% PASS
total/synth/MSIZE/a0 0.01 0.01 -10.7% PASS
total/synth/MSIZE/a1 0.01 0.01 -13.1% PASS
total/synth/MUL/b0 0.01 0.01 -10.3% PASS
total/synth/MUL/b1 0.01 0.01 -9.4% PASS
total/synth/NOT/u0 0.01 0.01 -10.6% PASS
total/synth/OR/b0 0.01 0.01 -10.3% PASS
total/synth/OR/b1 0.01 0.01 -9.5% PASS
total/synth/PC/a0 0.01 0.01 -10.7% PASS
total/synth/PC/a1 0.01 0.01 -13.2% PASS
total/synth/PUSH1/p0 0.01 0.01 +23.4% PASS
total/synth/PUSH1/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH10/p0 0.01 0.01 -0.6% PASS
total/synth/PUSH10/p1 0.01 0.01 -8.4% PASS
total/synth/PUSH11/p0 0.01 0.01 -1.4% PASS
total/synth/PUSH11/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH12/p0 0.01 0.01 -1.9% PASS
total/synth/PUSH12/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH13/p0 0.01 0.01 +0.2% PASS
total/synth/PUSH13/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH14/p0 0.01 0.01 +3.8% PASS
total/synth/PUSH14/p1 0.01 0.01 -8.4% PASS
total/synth/PUSH15/p0 0.01 0.01 -0.4% PASS
total/synth/PUSH15/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH16/p0 0.01 0.01 -2.9% PASS
total/synth/PUSH16/p1 0.01 0.01 -8.4% PASS
total/synth/PUSH17/p0 0.01 0.01 -5.0% PASS
total/synth/PUSH17/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH18/p0 0.01 0.01 -3.2% PASS
total/synth/PUSH18/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH19/p0 0.01 0.01 +8.8% PASS
total/synth/PUSH19/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH2/p0 0.01 0.01 +23.5% PASS
total/synth/PUSH2/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH20/p0 0.01 0.01 -3.3% PASS
total/synth/PUSH20/p1 0.01 0.01 -8.4% PASS
total/synth/PUSH21/p0 0.01 0.01 -3.9% PASS
total/synth/PUSH21/p1 0.01 0.01 -8.4% PASS
total/synth/PUSH22/p0 1.24 1.16 -6.4% PASS
total/synth/PUSH22/p1 1.32 1.45 +9.3% PASS
total/synth/PUSH23/p0 1.24 1.09 -12.1% PASS
total/synth/PUSH23/p1 1.33 1.49 +11.8% PASS
total/synth/PUSH24/p0 1.24 1.16 -6.7% PASS
total/synth/PUSH24/p1 1.33 1.45 +9.2% PASS
total/synth/PUSH25/p0 1.24 1.16 -6.6% PASS
total/synth/PUSH25/p1 1.33 1.46 +9.7% PASS
total/synth/PUSH26/p0 0.93 0.85 -8.1% PASS
total/synth/PUSH26/p1 1.33 1.48 +10.9% PASS
total/synth/PUSH27/p0 1.24 1.16 -6.5% PASS
total/synth/PUSH27/p1 1.35 1.47 +9.1% PASS
total/synth/PUSH28/p0 1.24 1.16 -6.4% PASS
total/synth/PUSH28/p1 1.33 1.48 +11.5% PASS
total/synth/PUSH29/p0 1.24 1.16 -6.7% PASS
total/synth/PUSH29/p1 1.36 1.48 +8.9% PASS
total/synth/PUSH3/p0 0.01 0.01 +22.8% PASS
total/synth/PUSH3/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH30/p0 1.25 1.19 -4.8% PASS
total/synth/PUSH30/p1 1.32 1.47 +11.3% PASS
total/synth/PUSH31/p0 1.25 0.89 -28.5% PASS
total/synth/PUSH31/p1 1.43 1.60 +11.6% PASS
total/synth/PUSH32/p0 1.24 1.16 -6.5% PASS
total/synth/PUSH32/p1 1.33 1.49 +11.7% PASS
total/synth/PUSH4/p0 0.01 0.01 +22.3% PASS
total/synth/PUSH4/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH5/p0 0.01 0.01 +21.4% PASS
total/synth/PUSH5/p1 0.01 0.01 -8.4% PASS
total/synth/PUSH6/p0 0.01 0.01 +19.5% PASS
total/synth/PUSH6/p1 0.01 0.01 -8.5% PASS
total/synth/PUSH7/p0 0.01 0.01 +22.9% PASS
total/synth/PUSH7/p1 0.01 0.01 -8.4% PASS
total/synth/PUSH8/p0 0.01 0.01 -0.7% PASS
total/synth/PUSH8/p1 0.01 0.01 -8.4% PASS
total/synth/PUSH9/p0 0.01 0.01 -1.3% PASS
total/synth/PUSH9/p1 0.01 0.01 -8.4% PASS
total/synth/RETURNDATASIZE/a0 0.61 0.53 -13.8% PASS
total/synth/RETURNDATASIZE/a1 0.58 0.49 -14.7% PASS
total/synth/SAR/b0 3.79 3.80 +0.1% PASS
total/synth/SAR/b1 4.33 4.32 -0.2% PASS
total/synth/SGT/b0 0.01 0.01 -10.4% PASS
total/synth/SGT/b1 0.01 0.01 -9.4% PASS
total/synth/SHL/b0 3.05 3.05 +0.2% PASS
total/synth/SHL/b1 1.69 1.62 -4.3% PASS
total/synth/SHR/b0 3.12 2.94 -5.5% PASS
total/synth/SHR/b1 1.57 1.63 +4.3% PASS
total/synth/SIGNEXTEND/b0 3.12 3.35 +7.6% PASS
total/synth/SIGNEXTEND/b1 3.67 3.49 -4.7% PASS
total/synth/SLT/b0 0.01 0.01 -10.3% PASS
total/synth/SLT/b1 0.01 0.01 -9.5% PASS
total/synth/SUB/b0 0.01 0.01 -10.4% PASS
total/synth/SUB/b1 0.01 0.01 -9.6% PASS
total/synth/SWAP1/s0 0.01 0.01 -7.3% PASS
total/synth/SWAP10/s0 0.01 0.01 -7.3% PASS
total/synth/SWAP11/s0 0.01 0.01 -7.2% PASS
total/synth/SWAP12/s0 0.01 0.01 -7.4% PASS
total/synth/SWAP13/s0 0.01 0.01 -7.4% PASS
total/synth/SWAP14/s0 0.01 0.01 -6.8% PASS
total/synth/SWAP15/s0 0.01 0.01 -7.3% PASS
total/synth/SWAP16/s0 0.01 0.01 -7.3% PASS
total/synth/SWAP2/s0 0.01 0.01 -7.3% PASS
total/synth/SWAP3/s0 0.01 0.01 -7.1% PASS
total/synth/SWAP4/s0 0.01 0.01 -6.9% PASS
total/synth/SWAP5/s0 0.01 0.01 -7.1% PASS
total/synth/SWAP6/s0 0.01 0.01 -7.5% PASS
total/synth/SWAP7/s0 0.01 0.01 -7.3% PASS
total/synth/SWAP8/s0 0.01 0.01 -7.4% PASS
total/synth/SWAP9/s0 0.01 0.01 -7.8% PASS
total/synth/XOR/b0 0.01 0.01 -10.3% PASS
total/synth/XOR/b1 0.01 0.01 -9.5% PASS
total/synth/loop_v1 1.42 1.40 -1.7% PASS
total/synth/loop_v2 1.35 1.32 -1.8% PASS

Summary: 194 benchmarks, 0 regressions


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Pull request overview

This PR adds a new “linear recurrence” memory precheck plan in the EVM MIR frontend to merge per-op memory expansion checks for repeated direct-memory MLOAD/MSTORE motifs (especially those driven by a stride), and introduces new EVM asm samples intended to exercise the optimization/regression cases.

Changes:

  • Add a new block-level linear memory precheck plan, with emission/consumption logic in EVMMirBuilder (and new compile stats counters).
  • Extend EVMByteCodeVisitor block analysis to detect specific linear-recurring MLOAD/MSTORE bytecode motifs and feed the plan into the builder.
  • Add new tests/evm_asm/* samples/expected outputs for linear memory motifs and a const-precheck regression case.

Reviewed changes

Copilot reviewed 13 out of 13 changed files in this pull request and generated 5 comments.

Show a summary per file
File Description
src/compiler/evm_frontend/evm_mir_compiler.h Declares linear precheck plan APIs/state and new compile stats counter fields.
src/compiler/evm_frontend/evm_mir_compiler.cpp Implements linear precheck planning/emission and wires it into handleMLoad/handleMStore; extends logging/stats.
src/action/evm_bytecode_visitor.h Adds bytecode motif scanning for linear direct-memory recurrences and calls into builder to prepare/emit the precheck.
tests/evm_asm/memory_linear_mstore_step.easm New asm sample intended to match the linear MSTORE motif with a final RETURN.
tests/evm_asm/memory_linear_mstore_step.expected Expected result for the above sample.
tests/evm_asm/memory_linear_mstore_hit.easm New asm sample intended to match the linear MSTORE motif ending with STOP.
tests/evm_asm/memory_linear_mstore_hit.expected Expected result for the above sample.
tests/evm_asm/memory_linear_mload_step.easm New asm sample intended to match the linear MLOAD motif with a final RETURN.
tests/evm_asm/memory_linear_mload_step.expected Expected result for the above sample.
tests/evm_asm/memory_linear_mload_hit.easm New asm sample intended to match the linear MLOAD motif ending with STOP.
tests/evm_asm/memory_linear_mload_hit.expected Expected result for the above sample.
tests/evm_asm/memory_const_precheck_regress.easm New asm sample for const-precheck regression coverage.
tests/evm_asm/memory_const_precheck_regress.expected Expected result for the above sample.

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Comment on lines +1 to +3
PUSH1 0x00
CALLDATALOAD
PUSH1 0x00
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This test’s stride is sourced from CALLDATALOAD, but the current evm_asm harness executes with input_size = 0, so the loaded stride will always be 0. That means the test won’t exercise the non-zero stride/overflow behavior of the new linear-precheck logic (it mostly becomes a degenerate same-address sequence). Consider extending the harness to allow providing calldata for these .hex cases (or adding an alternative JIT test that can supply calldata) so this pattern is actually validated.

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Comment on lines +1 to +4
PUSH1 0x00
CALLDATALOAD
PUSH1 0x00

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This test’s stride is sourced from CALLDATALOAD, but the current evm_asm harness executes with input_size = 0, so the loaded stride will always be 0. That means the test won’t exercise the non-zero stride/overflow behavior of the new linear-precheck logic (it mostly becomes a degenerate same-address sequence). Consider extending the harness to allow providing calldata for these .hex cases (or adding an alternative JIT test that can supply calldata) so this pattern is actually validated.

Suggested change
PUSH1 0x00
CALLDATALOAD
PUSH1 0x00
PUSH1 0x20
PUSH1 0x00

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Comment on lines +3183 to +3189
if (!tryConsumeLinearBlockMemoryPrecheck(Offset, nullptr) &&
!tryConsumeConstBlockMemoryPrecheck()) {
MInstruction *SizeConst = createIntConstInstruction(I64Type, 32);
MInstruction *RequiredSize = createInstruction<BinaryInstruction>(
false, OP_add, I64Type, Offset, SizeConst);
MInstruction *Overflow = createInstruction<CmpInstruction>(
false, CmpInstruction::Predicate::ICMP_ULT, I64Type, RequiredSize,
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The new linear block memory precheck path isn’t covered by any test that actually runs the EVM frontend compiler/JIT. The added tests/evm_asm/* cases are executed via the interpreter harness, so they won’t detect regressions in tryConsumeLinearBlockMemoryPrecheck()/setMemoryCompileBlockLinearPrecheckPlan(). Please add a JIT/multipass-mode test that compiles and executes one of these patterns and asserts the behavior that should change (e.g., only a single memory expand/check emitted for the block, or the related compile stats/log counters).

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Comment on lines +1 to +3
PUSH1 0x00
CALLDATALOAD
PUSH1 0x00
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Copilot AI Mar 29, 2026

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This test’s stride is sourced from CALLDATALOAD, but the current evm_asm harness executes with input_size = 0, so the loaded stride will always be 0. That means the test won’t exercise the non-zero stride/overflow behavior of the new linear-precheck logic (it mostly becomes a degenerate same-address sequence). Consider extending the harness to allow providing calldata for these .hex cases (or adding an alternative JIT test that can supply calldata) so this pattern is actually validated.

Copilot uses AI. Check for mistakes.
Comment on lines +1 to +3
PUSH1 0x00
CALLDATALOAD
PUSH1 0x00
Copy link

Copilot AI Mar 29, 2026

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This test’s stride is sourced from CALLDATALOAD, but the current evm_asm harness executes with input_size = 0, so the loaded stride will always be 0. That means the test won’t exercise the non-zero stride/overflow behavior of the new linear-precheck logic (it mostly becomes a degenerate same-address sequence). Consider extending the harness to allow providing calldata for these .hex cases (or adding an alternative JIT test that can supply calldata) so this pattern is actually validated.

Suggested change
PUSH1 0x00
CALLDATALOAD
PUSH1 0x00
PUSH1 0x20
PUSH1 0x00

Copilot uses AI. Check for mistakes.
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2 participants