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Add verr & verw instructions #23

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918029c
Add verr & verw instructions
Alpha-Lin Jun 23, 2025
7f670e7
Add tests for verX and partially fix impl
Alpha-Lin Jun 25, 2025
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2 changes: 2 additions & 0 deletions Makefile.am
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Original file line number Diff line number Diff line change
Expand Up @@ -258,6 +258,8 @@ TEST_ASM = \
test/sub.asm \
test/test.asm \
test/vaddpd.asm \
test/verr.asm \
test/verw.asm \
test/vector_add.asm \
test/vector_add_mem.asm \
test/vector_float_divide.asm \
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2 changes: 2 additions & 0 deletions src/enums.h
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Expand Up @@ -269,6 +269,8 @@ typedef enum {
test,
vaddpd,
vdivpd,
verr,
verw,
vmovdqu,
vmovupd,
vmulpd,
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2 changes: 2 additions & 0 deletions src/instructions.c
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Expand Up @@ -303,6 +303,8 @@ const struct instr_table INSTR_TABLE[] = {
{{'\0'}, test, {NA, NA}, I, PAD_ALWAYS, 1, NA, 2, {REX, 0xa8}},
{"vaddpd", vaddpd, {yym, yyy}, RVM, VECTOR_AVX, NA, NA, 3, {VEX(NDS,B256,X66,X0F,WIG), 0x58, REG}},
{"vdivpd", vdivpd, {yym, yyy}, RVM, VECTOR_AVX, NA, NA, 3, {VEX(NDS,B256,X66,X0F,WIG), 0x5e, REG}},
{"verr", verr, {r, m}, M, OTHER, NA, 4, 3, {0x0f, 0x00, REG}},
{"verw", verw, {r, m}, M, OTHER, NA, 5, 3, {0x0f, 0x00, REG}},
{"vmovupd", vmovupd, {ym, yy}, RM, VECTOR_AVX, NA, NA, 3, {VEX(NNN,B256,X66,X0F,WIG), 0x10, REG}},
{{'\0'}, vmovupd, {my, NA}, MR, VECTOR_AVX, NA, NA, 3, {VEX(NNN,B256,X66,X0F,WIG), 0x11, REG}},
{{'\0'}, vmovupd, {vm, vv}, RM, VECTOR_AVX, NA, NA, 3, {VEX(NNN,B128,X66,X0F,WIG), 0x10, REG}},
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34 changes: 34 additions & 0 deletions test/verr.asm
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@@ -0,0 +1,34 @@
SECTION .text
GLOBAL test
test:
verr [rax]
verr [rbx]
verr [rcx]
verr [rdx]
verr [rbp]
verr [rsp]
verr [rsi]
verr [rdi]
verr [rbx+4]
verr [rbp-2]
verr [rdi+0]
;verr rax
;verr rbx
;verr rcx
;verr rdx
;verr rbp
;verr rsp
;verr rsi
;verr rdi
;verr r8
;verr r9
;verr r10
;verr r11
;verr r12
;verr r13
;verr r14
;verr r15
;verr r8
;verr r8
;verr r8
;verr r8
46 changes: 46 additions & 0 deletions test/verw.asm
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@@ -0,0 +1,46 @@
SECTION .text
GLOBAL test
test:
verw [rax]
verw [rbx]
verw [rcx]
verw [rdx]
verw [rbp]
verw [rsp]
verw [rsi]
verw [rdi]
verw [rbx+4]
verw [rbp-2]
verw [rdi+0]
;verw [r8]
;verw [r9]
;verw [r10]
;verw [r11]
;verw [r12]
;verw [r13]
;verw [r14]
;verw [r15]
;verw [r8]
;verw [r8]
;verw [r8]
;verw [r8]
;verw rax
;verw rbx
;verw rcx
;verw rdx
;verw rbp
;verw rsp
;verw rsi
;verw rdi
;verw r8
;verw r9
;verw r10
;verw r11
;verw r12
;verw r13
;verw r14
;verw r15
;verw r8
;verw r8
;verw r8
;verw r8