How did you get baud rate of 19200 for 10ns system clk and 80ns uart clk? #1328
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Is it 41? |
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The clock divider is automatically calculated from the CPU clock rate (via the top's neorv32/sw/lib/source/neorv32_uart.c Lines 47 to 100 in b29cc30 The target baud rate is 19200, which corresponds to a bit time of 52.1µs = 5210ns. To do this, the above function calculates a clock divider and a prescaler.
For this particular case, the function calculates a clock divider of 650 and selects the prescaler "2" which divides the clock (according to the table) by 8 again. Finall we have: |
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Hi
May i know how you get 19200 baud for these parameters?
I am seeing in the waveform clk = 100MHz which is 10ns and inside uart module this multiplied by 8 which gives 80ns.
80ns = 12.5MHz.
I think the prescalar is not standard 16.
What is the prescalar value?
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