[Assembler] Identity pto.tmov (dst == src) causes spurious sync insertion, hanging on A5

[Hzfengsy]

When a pto.tmov instruction has the same source and destination (identity move), ptoas still treats it as a data-movement op and inserts sync instructions around it. These spurious syncs cause synchronization errors that hang the kernel on A5. The same code passes on A3 due to different sync behavior between the two platforms.

Root Cause

ptoas unconditionally inserts sync instructions around every pto.tmov. When the tmov is a no-op (dst == src), the syncs are unnecessary and harmful.

Suggested Fix

ptoas should detect identity pto.tmov instructions (where source and destination resolve to the same address/MemRef) and either:

1. Skip sync insertion for identity moves, or
2. Eliminate identity pto.tmov instructions entirely

Reproducer

fa5_softmax_rescale.py

Related

• [Codegen] Identity pto.tmov (dst == src) causes ptoas to insert spurious sync, hanging on A5 pypto#828 (original issue, filed on wrong repo)
• [Performance] Codegen IfStmt emit_branch inserts redundant pto.tmov when MemoryReuse already unifies yield MemRefs pypto#803
• [A5 E2E] qwen3_32b_decode_tilelet — Full Decode Layer Validation pypto-lib#58

Note

A complementary fix has been applied on the pypto side (hw-native-sys/pypto#836) to avoid emitting identity pto.tmov in the first place. However, ptoas should still handle this case defensively.

[zhangstevenunity]

pto-isa当中退化的16x1的colmajor的tmov在A5上的实现会导致第二行的vload/vstore不按照32B对齐。

[TaoTao-real]

Cross-repo tracking: related ISA-side investigation is now tracked at hw-native-sys/pto-isa#58
Link: hw-native-sys/pto-isa#58
This issue focuses on potential A5 TMOV col_major 16x1 vec->vec alignment risk (error 340).