Execution-Unit/Block1.bdf at main · hebaashraf21/Execution-Unit · GitHub

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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2020  Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and any partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors.  Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.
*/
(header "graphic" (version "1.4"))
(pin
	(input)
	(rect 344 240 512 256)
	(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
	(text "clk" (rect 5 0 20 12)(font "Arial" ))
	(pt 168 8)
	(drawing
		(line (pt 84 12)(pt 109 12))
		(line (pt 84 4)(pt 109 4))
		(line (pt 113 8)(pt 168 8))
		(line (pt 84 12)(pt 84 4))
		(line (pt 109 4)(pt 113 8))
		(line (pt 109 12)(pt 113 8))
	)
	(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
)
(pin
	(input)
	(rect 408 256 576 272)
	(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
	(text "l" (rect 5 0 9 17)(font "Intel Clear" ))
	(pt 168 8)
	(drawing
		(line (pt 84 12)(pt 109 12))
		(line (pt 84 4)(pt 109 4))
		(line (pt 113 8)(pt 168 8))
		(line (pt 84 12)(pt 84 4))
		(line (pt 109 4)(pt 113 8))
		(line (pt 109 12)(pt 113 8))
	)
	(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
)
(pin
	(output)
	(rect 720 240 896 256)
	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
	(text "Q[3..0]" (rect 90 0 121 17)(font "Intel Clear" ))
	(pt 0 8)
	(drawing
		(line (pt 0 8)(pt 52 8))
		(line (pt 52 4)(pt 78 4))
		(line (pt 52 12)(pt 78 12))
		(line (pt 52 12)(pt 52 4))
		(line (pt 78 4)(pt 82 8))
		(line (pt 82 8)(pt 78 12))
		(line (pt 78 12)(pt 82 8))
	)
)
(symbol
	(rect 592 216 704 312)
	(text "Block7" (rect 5 0 45 19)(font "Intel Clear" (font_size 8)))
	(text "inst" (rect 8 75 24 92)(font "Intel Clear" ))
	(port
		(pt 0 32)
		(input)
		(text "clk" (rect 0 0 16 19)(font "Intel Clear" (font_size 8)))
		(text "clk" (rect 21 27 37 46)(font "Intel Clear" (font_size 8)))
		(line (pt 0 32)(pt 16 32))
	)
	(port
		(pt 0 48)
		(input)
		(text "l" (rect 0 0 3 19)(font "Intel Clear" (font_size 8)))
		(text "l" (rect 21 43 24 62)(font "Intel Clear" (font_size 8)))
		(line (pt 0 48)(pt 16 48))
	)
	(port
		(pt 112 32)
		(output)
		(text "Q[3..0]" (rect 0 0 40 19)(font "Intel Clear" (font_size 8)))
		(text "Q[3..0]" (rect 51 27 91 46)(font "Intel Clear" (font_size 8)))
		(line (pt 112 32)(pt 96 32)(line_width 3))
	)
	(drawing
		(rectangle (rect 16 16 96 80))
	)
)
(connector
	(pt 720 248)
	(pt 704 248)
	(bus)
)
(connector
	(pt 592 248)
	(pt 512 248)
)
(connector
	(pt 592 264)
	(pt 576 264)
)