out (c),0 [ED 71] can actually write a value different than 0

[sverx]

The undocumented [ED 71], albeit commonly called out (c),0, can actually output a value different than zero depending on the implementation - for instance on the SEGA Game Gear (CMOS) it outputs 0xFF instead. I think there's should be a note in the description.

[dt-anchorzero]

Thanks @sverx, I'll make a note of that.

What's a good reference for the behavior on the SEGA Game Gear?

[sverx]

I wouldn't know what I could suggest. AFAIK the only difference in the processor's behavior is this one.

[sverx]

Anyway, note that this difference is not specific to the SEGA Game Gear, it's about CMOS/NMOS Z80 processors.
Here's a post from benryves on Reddit -> https://www.reddit.com/r/Z80/comments/hwglc4/comment/fz0kt7w/?utm_source=share&utm_medium=web3x&utm_name=web3xcss&utm_term=1&utm_content=share_button which links to this document -> https://worldofspectrum.org/z88forever/dn327/z80undoc.htm on WorldOfSpectrum.org, I hope it helps.

[fghsgh]

On my 84+ (TA1 ASIC), out (c),0 appears to output the value of B:

  ld bc,$0141
  out (c),0
  in l,(c)

outputs $01. I've tried a few arrangements and all of them seem to do the same thing.

Notably, I once tried an LCD clearing routine:

clrlcd:
  ld a,$01
  out ($10),a
  ld a,$05
  out ($10),a

  ld c,$11
  ld a,$20

  .outerloop:
    out ($10),a
    ld b,64
    .innerloop:
      out (c),0
      djnz .innerloop
    inc a
    cp $2c
    jr c,.outerloop
  ret

...which filled the entire screen with the B counter.

The Z80 design TI uses is allegedly the standard CMOS one, but clearly not. (another difference is that bits 3 & 5 are always set to 0)

[sverx]

This is interesting! 😃
Can you confirm that out (c),0 is indeed assembled as [ED 71] and not as [ED 41] (as that would be out (c),b) on your assembler?

[fghsgh]

I actually typed it in as hex codes, and yes, I did manually use ED71. e.g.

AsmPrgm
0141AA
ED71ED68
EF0745C9

EF0745 outputs HL as 10154 (27AA)

(port 41 is a free-use port that latches all 8 bits on this platform, and port 10 in my last post is the LCD control port)

(also, I was using a different assembler back when I wrote that clrlcd routine)

EDIT: but that's actually a good theory. The code for B is 000, but maybe it's just a silicon bug rather than an assembler bug...

[sverx]

Thanks for the confirmation.
I then suppose this TA1 ASIC has a different implementation where [ED 71] -which in theory is an invalid opcode- works just as [ED 41] for whatever reason.