3232#define SERIAL_5N2 USARTClass::Mode_5N2
3333#define SERIAL_6N2 USARTClass::Mode_6N2
3434#define SERIAL_7N2 USARTClass::Mode_7N2
35+ #define SERIAL_8N2 USARTClass::Mode_8N2
3536#define SERIAL_5E1 USARTClass::Mode_5E1
3637#define SERIAL_6E1 USARTClass::Mode_6E1
3738#define SERIAL_7E1 USARTClass::Mode_7E1
3839#define SERIAL_5E2 USARTClass::Mode_5E2
3940#define SERIAL_6E2 USARTClass::Mode_6E2
4041#define SERIAL_7E2 USARTClass::Mode_7E2
42+ #define SERIAL_8E2 USARTClass::Mode_8E2
4143#define SERIAL_5O1 USARTClass::Mode_5O1
4244#define SERIAL_6O1 USARTClass::Mode_6O1
4345#define SERIAL_7O1 USARTClass::Mode_7O1
4446#define SERIAL_5O2 USARTClass::Mode_5O2
4547#define SERIAL_6O2 USARTClass::Mode_6O2
4648#define SERIAL_7O2 USARTClass::Mode_7O2
49+ #define SERIAL_8O2 USARTClass::Mode_8O2
50+ #define SERIAL_5M1 USARTClass::Mode_5M1
51+ #define SERIAL_6M1 USARTClass::Mode_6M1
52+ #define SERIAL_7M1 USARTClass::Mode_7M1
53+ #define SERIAL_5M2 USARTClass::Mode_5M2
54+ #define SERIAL_6M2 USARTClass::Mode_6M2
55+ #define SERIAL_7M2 USARTClass::Mode_7M2
56+ #define SERIAL_8M2 USARTClass::Mode_8M2
57+ #define SERIAL_5S1 USARTClass::Mode_5S1
58+ #define SERIAL_6S1 USARTClass::Mode_6S1
59+ #define SERIAL_7S1 USARTClass::Mode_7S1
60+ #define SERIAL_5S2 USARTClass::Mode_5S2
61+ #define SERIAL_6S2 USARTClass::Mode_6S2
62+ #define SERIAL_7S2 USARTClass::Mode_7S2
63+ #define SERIAL_8S2 USARTClass::Mode_8S2
64+
4765
4866class USARTClass : public UARTClass
4967{
@@ -59,19 +77,36 @@ class USARTClass : public UARTClass
5977 Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
6078 Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
6179 Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
80+ Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
6281 Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
6382 Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
6483 Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
6584 Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
6685 Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
6786 Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
68- Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
87+ Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
88+ Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
6989 Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
7090 Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
7191 Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
7292 Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
7393 Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
74- };
94+ Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
95+ Mode_5M1 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
96+ Mode_6M1 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
97+ Mode_7M1 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
98+ Mode_5M2 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
99+ Mode_6M2 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
100+ Mode_7M2 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
101+ Mode_8M2 = US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
102+ Mode_5S1 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
103+ Mode_6S1 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
104+ Mode_7S1 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
105+ Mode_5S2 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
106+ Mode_6S2 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
107+ Mode_7S2 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
108+ Mode_8S2 = US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
109+ };
75110
76111 USARTClass ( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer );
77112
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