[Refactor] Remove deprecated env var

Author: YWHyuk

PyTorchSimFrontend/extension_codecache.py

@@ -27,19 +27,6 @@ def dump_metadata(args, arg_attributes, path):
             file.write(f'{arg_name}=({arg_attribute[0]}, {arg.dtype}, {arg.shape})\n')
     return
 
-def llvm_compile_command(input, output):
-    opt_output = f"{input[:-3]}_opt.ll"
-    return [re.sub(r"[ \n]+", " ",
-        f"""
-            {extension_config.CONFIG_TORCHSIM_LLVM_PATH}/opt --load-pass-plugin={extension_config.CONFIG_TORCHSIM_CUSTOM_PASS_PATH}/libLowerGemminiPass.so -S -march=riscv64 --passes=LowerGemminiPass {input} -o {opt_output}
-        """,
-    ).strip(),
-            re.sub(r"[ \n]+", " ",
-        f"""
-            {extension_config.CONFIG_TORCHSIM_LLVM_PATH}/llc -march=riscv64 -mattr=+m,+f,+d,+a,+c,+v -O2 {opt_output} -o {output}
-        """,
-    ).strip()]
-
 def mlir_compile_command(filename, vectorlane_size, vlen=256):
     return [re.sub(r"[ \n]+", " ",
         f"""

PyTorchSimFrontend/extension_config.py

@@ -42,9 +42,6 @@ def __getattr__(name):
     # LLVM PATH
     if name == "CONFIG_TORCHSIM_LLVM_PATH":
         return os.environ.get('TORCHSIM_LLVM_PATH', default="/usr/bin")
-    if name == "CONFIG_TORCHSIM_CUSTOM_PASS_PATH":
-        return os.environ.get('TORCHSIM_CUSTOM_PASS_PATH',
-                                              default=f"{__getattr__('CONFIG_TORCHSIM_DIR')}/GemminiLowerPass/build")
     if name == "CONFIG_TORCHSIM_DUMP_MLIR_IR":
         return int(os.environ.get("TORCHSIM_DUMP_MLIR_IR", default=False))
     if name == "CONFIG_TORCHSIM_DUMP_LLVM_IR":
@@ -68,10 +65,6 @@ def __getattr__(name):
         return os.environ.get('GEM5_SCRIPT_PATH',
                                       default=f"{__getattr__('CONFIG_TORCHSIM_DIR')}/gem5_script/script_systolic.py")
 
-    # For block sparse
-    if name == "CONFIG_BLOCK_SPARSE":
-        return int(os.environ.get('BLOCK_SPARSE', default=0))
-
     # Mapping Policy
     if name == "CONFIG_MAPPING_POLICY":
         return os.environ.get('TORCHSIM_MAPPING_POLICY', default="heuristic") # heuristic, manual, autotune

README.md

@@ -333,8 +333,6 @@ export TORCHSIM_VECTOR_LANE=128 # vector lane size
 export TORCHSIM_VECTOR_LANE_STRIDE=2  # vector lane stride for DMA
 export TORCHSIM_DIR=/workspace/PyTorchSim # home directory
 
-export BLOCK_SPARSE=0 # If you want to use block sparse workload, turn it on
-
 # Plan which tensor allocated in TPUv4's CMEM
 export SRAM_BUFFER_PLAN_PATH=/workspace/PyTorchSim/tpuv4/gemm_plan.py