The MCU goes into hard fault directly after debugger startup - STM32MP157C-M4

[maxime-gaschet-devmg]

Description

I'm trying to debug the M4 core of the STM32MP157C using a JLINK probe. The chip is in ENGINEERING mode, so the A7 core shouldn't interfere. The project uses CMAKE.
When I use Stm32CubeIde the debug is done correctly. On startup, the breakpoint on the main is correct and step-by-step works.
When I use VScode with cortex-debug, I can have a breakpoint on the startup.s but once I do a run or a step by step, the chip goes into hard fault (PC = 0x08).
Given that the 2 configurations use exactly the same tools, I wonder if the problem might be with the cortex-debug plugin?
Thanks for your support.

Environment

• Cortex-Debug Version 1.12.1
• OS: Linux Ubuntu 24.10
• GDB Version: stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.jlink.linux64_2.4.0.202501261557
• Compiler Toolchain Version: stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706

launch.json

{
    "version": "0.2.0",
    "configurations": [
        {
            "name": "Debug JLink",
            "cwd": "${workspaceRoot}",
            "executable": "/home/user/repo/ceva_4dot0_needleless_stm32mp157c_m4_cmake/build-debug_mg_lnx/ceva_4dot0_needleless_stm32mp157c_m4_cmake.elf", // CMake.
            // "executable": "/home/user/app/cubeIdeWorkspace/debugger_with_cubeIde_cmake/build/ceva_4dot0_needleless_stm32mp157c_m4_cmake.elf", // CubeIde.
            "request": "launch",
            "type": "cortex-debug",
            "servertype": "jlink",
            "device": "STM32MP15xx_M4",
            "interface": "swd",
            // "preLaunchTask": "CMake: build",
            "runToEntryPoint": "main",
            // "breakAfterReset" : true,
            // "liveWatch": {
            //     "enabled": true,
            //     "samplesPerSecond": 4
            // },
            "showDevDebugOutput": "raw",
            "swoConfig": {
                "enabled": false,
            },
           "serverArgs": [
                "-speed", "4000", // kHz.
                "-vd", // Verify download.
            ],
            "numberOfProcessors": 2,
            "targetProcessor": 0, // 0 = M4.
        }
    ]
}

cortex-debug Console

Cortex-Debug: VSCode debugger extension version 1.12.1 git(652d042). Usage info: https://github.com/Marus/cortex-debug#usage
"configuration": {
    "name": "Debug JLink",
    "cwd": "/home/user/repo/ceva_4dot0_needleless_stm32mp157c_m4_cmake",
    "executable": "/home/user/repo/ceva_4dot0_needleless_stm32mp157c_m4_cmake/build-debug_mg_lnx/ceva_4dot0_needleless_stm32mp157c_m4_cmake.elf",
    "request": "launch",
    "type": "cortex-debug",
    "servertype": "jlink",
    "device": "STM32MP15xx_M4",
    "interface": "swd",
    "runToEntryPoint": "main",
    "showDevDebugOutput": "raw",
    "swoConfig": {
        "enabled": false,
        "source": "probe",
        "decoders": []
    },
    "serverArgs": [
        "-speed",
        "4000",
        "-vd"
    ],
    "numberOfProcessors": 2,
    "targetProcessor": 0,
    "__configurationTarget": 6,
    "gdbServerConsolePort": 55878,
    "pvtAvoidPorts": [],
    "chainedConfigurations": {
        "enabled": false
    },
    "debuggerArgs": [],
    "rttConfig": {
        "enabled": false,
        "decoders": []
    },
    "graphConfig": [],
    "preLaunchCommands": [],
    "postLaunchCommands": [],
    "preAttachCommands": [],
    "postAttachCommands": [],
    "preRestartCommands": [],
    "postRestartCommands": [],
    "preResetCommands": [],
    "postResetCommands": [],
    "serverpath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.jlink.linux64_2.4.0.202501261557/tools/bin/JLinkGDBServer",
    "toolchainPath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/",
    "toolchainPrefix": "arm-none-eabi",
    "gdbPath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-gdb",
    "objdumpPath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-objdump",
    "extensionPath": "/home/user/.vscode/extensions/marus25.cortex-debug-1.12.1",
    "registerUseNaturalFormat": true,
    "variableUseNaturalFormat": true,
    "pvtVersion": "1.12.1",
    "__sessionId": "4b00fcdf-afb0-408a-b3b9-56c545daab70",
    "pvtShowDevDebugOutput": "raw"
}
Reading symbols from /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-objdump --syms -C -h -w /home/user/repo/ceva_4dot0_needleless_stm32mp157c_m4_cmake/build-debug_mg_lnx/ceva_4dot0_needleless_stm32mp157c_m4_cmake.elf
Reading symbols from /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-nm --defined-only -S -l -C -p /home/user/repo/ceva_4dot0_needleless_stm32mp157c_m4_cmake/build-debug_mg_lnx/ceva_4dot0_needleless_stm32mp157c_m4_cmake.elf
Launching GDB: /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-gdb -q --interpreter=mi2
1-gdb-version
Launching gdb-server: /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.jlink.linux64_2.4.0.202501261557/tools/bin/JLinkGDBServer -singlerun -nogui -if swd -port 50000 -swoport 50002 -telnetport 50004 -device STM32MP15xx_M4 -speed 4000 -vd
    Please check TERMINAL tab (gdb-server) for output from /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.jlink.linux64_2.4.0.202501261557/tools/bin/JLinkGDBServer
Finished reading symbols from objdump: Time: 16 ms
-> =thread-group-added,id="i1"
-> ~"GNU gdb (GNU Tools for STM32 13.3.rel1.20240926-1715) 14.2.90.20240526-git\n"
-> ~"Copyright (C) 2023 Free Software Foundation, Inc.\n"
-> ~"License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>\nThis is free software: you are free to change and redistribute it.\nThere is NO WARRANTY, to the extent permitted by law."
-> ~"\nType \"show copying\" and \"show warranty\" for details.\n"
-> ~"This GDB was configured as \"--host=x86_64-linux-gnu --target=arm-none-eabi\".\n"
-> ~"Type \"show configuration\" for configuration details.\n"
-> ~"For bug reporting instructions, please see:\n"
-> ~"<https://www.gnu.org/software/gdb/bugs/>.\n"
-> ~"Find the GDB manual and other documentation resources online at:\n    <"
-> ~"http://www.gnu.org/software/gdb/documentation/>.\n\n"
-> ~"For help, type \"help\".\n"
-> ~"Type \"apropos word\" to search for commands related to \"word\".\n"
-> 1^done
2-gdb-set mi-async on
-> 2^done
3-interpreter-exec console "set print demangle on"
Finished reading symbols from nm: Time: 27 ms
-> 3^done
4-interpreter-exec console "set print asm-demangle on"
-> =cmd-param-changed,param="print asm-demangle",value="on"
-> 4^done
5-enable-pretty-printing
-> 5^done
6-interpreter-exec console "source /home/user/.vscode/extensions/marus25.cortex-debug-1.12.1/support/gdbsupport.init"
-> 6^done
7-interpreter-exec console "source /home/user/.vscode/extensions/marus25.cortex-debug-1.12.1/support/gdb-swo.init"
-> =cmd-param-changed,param="language",value="c"
-> =cmd-param-changed,param="language",value="auto"
-> 7^done
8-interpreter-exec console "set output-radix 0xa"
-> ~"Output radix now set to decimal 10, hex a, octal 12.\n"
Output radix now set to decimal 10, hex a, octal 12.
-> 8^done
9-interpreter-exec console "set input-radix 0xa"
-> ~"Input radix now set to decimal 10, hex a, octal 12.\n"
Input radix now set to decimal 10, hex a, octal 12.
-> 9^done
10-file-exec-and-symbols "/home/user/repo/ceva_4dot0_needleless_stm32mp157c_m4_cmake/build-debug_mg_lnx/ceva_4dot0_needleless_stm32mp157c_m4_cmake.elf"
-> 10^done
11-target-select extended-remote localhost:50000
-> =thread-group-started,id="i1",pid="42000"
-> =thread-created,id="1",group-id="i1"
-> ~"0x00000008 in g_pfnVectors ()\n"
0x00000008 in g_pfnVectors ()
-> *stopped,frame={addr="0x00000008",func="g_pfnVectors",args=[],arch="armv7e-m"},thread-id="1",stopped-threads="all"
mi2.status = stopped
Program stopped, probably due to a reset and/or halt issued by debugger
-> 11^connected
12-interpreter-exec console "monitor halt"
-> 12^done
13-interpreter-exec console "monitor reset"
-> @"Resetting target\r\n"
Resetting target
-> 13^done
14-target-download
-> 14+download,{section=".isr_vector",section-size="920",total-size="1124904"}
-> 14+download,{section=".isr_vector",section-sent="920",section-size="920",total-sent="920",total-size="1124904"}
-> 14+download,{section=".text",section-size="86084",total-size="1124904"}
-> 14+download,{section=".text",section-sent="79680",section-size="86084",total-sent="80600",total-size="1124904"}
-> 14+download,{section=".rodata",section-size="11984",total-size="1124904"}
-> 14+download,{section=".ARM",section-size="8",total-size="1124904"}
-> 14+download,{section=".init_array",section-size="4",total-size="1124904"}
-> 14+download,{section=".fini_array",section-size="4",total-size="1124904"}
-> 14+download,{section=".data",section-size="1616",total-size="1124904"}
-> 14^done,address="0x10001564",load-size="100620",transfer-rate="1173408",write-rate="8385"
15-interpreter-exec console "monitor reset"
-> @"Resetting target\r\n"
Resetting target
-> 15^done
Returning dummy thread-id to workaround VSCode issue with pause button not working
Returning dummy stack frame to workaround VSCode issue with pause button not working: {"threadId":1,"startFrame":0,"levels":20}
16-break-insert -t --function main
-> 16^done,bkpt={number="1",type="breakpoint",disp="del",enabled="y",addr="0x1000191a",func="main",file="/home/user/repo/ceva_4dot0_needleless_stm32mp157c_m4_cmake/CM4/Core/Src/main.c",fullname="/home/user/repo/ceva_4dot0_needleless_stm32mp157c_m4_cmake/CM4/Core/Src/main.c",line="78",thread-groups=["i1"],times="0",original-location="-function main"}
17-exec-continue --all
-> 17^running
-> *running,thread-id="all"
mi2.status = running

cortex-debug Terminal

[2025-03-13T08:31:19.366Z] SERVER CONSOLE DEBUG: onBackendConnect: gdb-server session connected. You can switch to "DEBUG CONSOLE" to see GDB interactions.
/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.jlink.linux64_2.4.0.202501261557/tools/bin/JLinkGDBServer -singlerun -nogui -if swd -port 50000 -swoport 50002 -telnetport 50004 -device STM32MP15xx_M4 -speed 4000 -vd
SEGGER J-Link GDB Server V8.12c Command Line Version

JLinkARM.dll V8.12c (DLL compiled Jan 22 2025 13:03:44)

Command line: -singlerun -nogui -if swd -port 50000 -swoport 50002 -telnetport 50004 -device STM32MP15xx_M4 -speed 4000 -vd
-----GDB Server start settings-----
GDBInit file:                  none
GDB Server Listening port:     50000
SWO raw output listening port: 50002
Terminal I/O port:             50004
Accept remote connection:      yes
Generate logfile:              off
Verify download:               on
Init regs on start:            off
Silent mode:                   off
Single run mode:               on
Target connection timeout:     0 ms
------J-Link related settings------
J-Link Host interface:         USB
J-Link script:                 none
J-Link settings file:          none
------Target related settings------
Target device:                 STM32MP15xx_M4
Target device parameters:      none
Target interface:              SWD
Target interface speed:        4000kHz
Target endian:                 little

Connecting to J-Link...
J-Link is connected.
Firmware: J-Link V11 compiled Feb 20 2025 16:24:17
Hardware: V11.00
S/N: 821010761
Feature(s): GDB
Checking target voltage...
Target voltage: 3.30 V
Listening on TCP/IP port 50000
Connecting to target...
Halting core...
Connected to target
Waiting for GDB connection...Connected to 127.0.0.1
GDB client (conn. 10) requested target.xml from GDB Server
Reading common registers: Read register 'r0' (4 bytes) from hardware: 0x00000000
Read register 'r1' (4 bytes) from hardware: 0x00000000
Read register 'r2' (4 bytes) from hardware: 0x00000000
Read register 'r3' (4 bytes) from hardware: 0x00000000
Read register 'r4' (4 bytes) from hardware: 0x00000000
Read register 'r5' (4 bytes) from hardware: 0x00000000
Read register 'r6' (4 bytes) from hardware: 0x00000000
Read register 'r7' (4 bytes) from hardware: 0x00000000
Read register 'r8' (4 bytes) from hardware: 0x00000000
Read register 'r9' (4 bytes) from hardware: 0x00000000
Read register 'r10' (4 bytes) from hardware: 0x00000000
Read register 'r11' (4 bytes) from hardware: 0x00000000
Read register 'r12' (4 bytes) from hardware: 0x00000000
Read register 'sp' (4 bytes) from hardware: 0x00010000
Read register 'lr' (4 bytes) from hardware: 0xFFFFFFFF
Read register 'pc' (4 bytes) from hardware: 0x08000000
Read register 'xpsr' (4 bytes) from hardware: 0x00000001
Read 4 bytes @ address 0x00000008 (Data = 0xE7FEE7FE)
Received monitor command: halt
Halting target CPU...
...Target halted (PC = 0x00000008)
Received monitor command: reset
Resetting target
Downloading 920 bytes @ address 0x00000000 - Verified OK
Downloading 16064 bytes @ address 0x10000000 - Verified OK
Downloading 15824 bytes @ address 0x10003EC0 - Verified OK
Downloading 16064 bytes @ address 0x10007C90 - Verified OK
Downloading 15824 bytes @ address 0x1000BB50 - Verified OK
Downloading 15904 bytes @ address 0x1000F920 - Verified OK
Downloading 6404 bytes @ address 0x10013740 - Verified OK
Downloading 11984 bytes @ address 0x10015048 - Verified OK
Downloading 8 bytes @ address 0x10017F18 - Verified OK
Downloading 4 bytes @ address 0x10017F20 - Verified OK
Downloading 4 bytes @ address 0x10017F24 - Verified OK
Downloading 1616 bytes @ address 0x10017F28 - Verified OK
Writing register 'pc' = 0x10001564
Received monitor command: reset
Resetting target
Reading 64 bytes @ address 0x10001900
Read 2 bytes @ address 0x1000191A (Data = 0xF36F)
Setting breakpoint @ address 0x1000191A, Kind = 2, Type = THUMB, BPHandle = 0x0001
Starting target CPU...

cubeIde Console

SEGGER J-Link GDB Server V8.12c Command Line Version

JLinkARM.dll V8.12c (DLL compiled Jan 22 2025 13:03:44)

Command line: -port 50000 -s -device STM32MP15xx_M4 -endian little -speed 4000 -if swd -vd
-----GDB Server start settings-----
GDBInit file:                  none
GDB Server Listening port:     50000
SWO raw output listening port: 2332
Terminal I/O port:             2333
Accept remote connection:      yes
Generate logfile:              off
Verify download:               on
Init regs on start:            off
Silent mode:                   off
Single run mode:               on
Target connection timeout:     0 ms
------J-Link related settings------
J-Link Host interface:         USB
J-Link script:                 none
J-Link settings file:          none
------Target related settings------
Target device:                 STM32MP15xx_M4
Target device parameters:      none
Target interface:              SWD
Target interface speed:        4000kHz
Target endian:                 little

Connecting to J-Link...
J-Link is connected.
Firmware: J-Link V11 compiled Feb 20 2025 16:24:17
Hardware: V11.00
S/N: 821010761
Feature(s): GDB
Checking target voltage...
Target voltage: 3.30 V
Listening on TCP/IP port 50000
Connecting to target...
Halting core...
Connected to target
Waiting for GDB connection...Connected to 127.0.0.1
GDB client (conn. 12) requested target.xml from GDB Server
Reading common registers: Read register 'r0' (4 bytes) from hardware: 0x00000000
Read register 'r1' (4 bytes) from hardware: 0x00000000
Read register 'r2' (4 bytes) from hardware: 0x00000000
Read register 'r3' (4 bytes) from hardware: 0x00000000
Read register 'r4' (4 bytes) from hardware: 0x00000000
Read register 'r5' (4 bytes) from hardware: 0x00000000
Read register 'r6' (4 bytes) from hardware: 0x00000000
Read register 'r7' (4 bytes) from hardware: 0x00000000
Read register 'r8' (4 bytes) from hardware: 0x00000000
Read register 'r9' (4 bytes) from hardware: 0x00000000
Read register 'r10' (4 bytes) from hardware: 0x00000000
Read register 'r11' (4 bytes) from hardware: 0x00000000
Read register 'r12' (4 bytes) from hardware: 0x00000000
Read register 'sp' (4 bytes) from hardware: 0x00010000
Read register 'lr' (4 bytes) from hardware: 0xFFFFFFFF
Read register 'pc' (4 bytes) from hardware: 0x08000000
Read register 'xpsr' (4 bytes) from hardware: 0x00000001
Read 4 bytes @ address 0x00000008 (Data = 0xE7FEE7FE)
Received monitor command: ReadAPEx 0x2000000 0xF8
O.K.:0xE00FF003
Received monitor command: ReadMemAP 0x2000000 0xE00FFFD0 0x8 0x0
O.K.:0x00000000,0x00000000,0x00000000,0x00000000,0x00000050,0x00000004,0x0000000A,0x00000000
Connected to 127.0.0.1
GDB client (conn. 13) requested target.xml from GDB Server
Reading common registers: Read register 'r0' (4 bytes) from hardware: 0x00000000
Read register 'r1' (4 bytes) from hardware: 0x00000000
Read register 'r2' (4 bytes) from hardware: 0x00000000
Read register 'r3' (4 bytes) from hardware: 0x00000000
Read register 'r4' (4 bytes) from hardware: 0x00000000
Read register 'r5' (4 bytes) from hardware: 0x00000000
Read register 'r6' (4 bytes) from hardware: 0x00000000
Read register 'r7' (4 bytes) from hardware: 0x00000000
Read register 'r8' (4 bytes) from hardware: 0x00000000
Read register 'r9' (4 bytes) from hardware: 0x00000000
Read register 'r10' (4 bytes) from hardware: 0x00000000
Read register 'r11' (4 bytes) from hardware: 0x00000000
Read register 'r12' (4 bytes) from hardware: 0x00000000
Read register 'sp' (4 bytes) from hardware: 0x00010000
Read register 'lr' (4 bytes) from hardware: 0xFFFFFFFF
Read register 'pc' (4 bytes) from hardware: 0x08000000
Read register 'xpsr' (4 bytes) from hardware: 0x00000001
Read 4 bytes @ address 0x00000008 (Data = 0xE7FEE7FE)
Received monitor command: reset
Resetting target
Received monitor command: reset
Resetting target
Received monitor command: halt
Halting target CPU...
...Target halted (PC = 0x00000008)
Downloading 920 bytes @ address 0x00000000 - Verified OK
Downloading 16064 bytes @ address 0x10000000 - Verified OK
Downloading 15824 bytes @ address 0x10003EC0 - Verified OK
Downloading 16064 bytes @ address 0x10007C90 - Verified OK
Downloading 15824 bytes @ address 0x1000BB50 - Verified OK
Downloading 15904 bytes @ address 0x1000F920 - Verified OK
Downloading 6404 bytes @ address 0x10013740 - Verified OK
Downloading 11984 bytes @ address 0x10015048 - Verified OK
Downloading 8 bytes @ address 0x10017F18 - Verified OK
Downloading 4 bytes @ address 0x10017F20 - Verified OK
Downloading 4 bytes @ address 0x10017F24 - Verified OK
Downloading 1616 bytes @ address 0x10017F28 - Verified OK
Writing register 'pc' = 0x10001564
Read 4 bytes @ address 0xE000ED14 (Data = 0x00000200)
Read 4 bytes @ address 0x10001564 (Data = 0x4685480D)
Read 2 bytes @ address 0x10001564 (Data = 0x480D)
Reading register 'msp' = 0x00000100
Reading register 'psp' = 0x00000000
Downloading 4 bytes @ address 0xE000ED14 - Verified OK
Reading common registers: Read register 'r0' (4 bytes) from hardware: 0x00000000
Read register 'r1' (4 bytes) from hardware: 0x00000000
Read register 'r2' (4 bytes) from hardware: 0x00000000
Read register 'r3' (4 bytes) from hardware: 0x00000000
Read register 'r4' (4 bytes) from hardware: 0x00000000
Read register 'r5' (4 bytes) from hardware: 0x00000000
Read register 'r6' (4 bytes) from hardware: 0x00000000
Read register 'r7' (4 bytes) from hardware: 0x00000000
Read register 'r8' (4 bytes) from hardware: 0x00000000
Read register 'r9' (4 bytes) from hardware: 0x00000000
Read register 'r10' (4 bytes) from hardware: 0x00000000
Read register 'r11' (4 bytes) from hardware: 0x00000000
Read register 'r12' (4 bytes) from hardware: 0x00000000
Read register 'sp' (4 bytes) from hardware: 0x00010000
Read register 'lr' (4 bytes) from hardware: 0xFFFFFFFF
Read register 'pc' (4 bytes) from hardware: 0x64150010
Read register 'xpsr' (4 bytes) from hardware: 0x00000001
Read 4 bytes @ address 0x10001564 (Data = 0x4685480D)
Read 2 bytes @ address 0x10001564 (Data = 0x480D)
Reading register 'msp' = 0x00000100
Reading register 'psp' = 0x00000000
Read 4 bytes @ address 0xE000EDFC (Data = 0x01000000)
Downloading 4 bytes @ address 0xE000EDFC - Verified OK
Reading common registers: Read register 'r0' (4 bytes) from hardware: 0x00000000
Read register 'r1' (4 bytes) from hardware: 0x00000000
Read register 'r2' (4 bytes) from hardware: 0x00000000
Read register 'r3' (4 bytes) from hardware: 0x00000000
Read register 'r4' (4 bytes) from hardware: 0x00000000
Read register 'r5' (4 bytes) from hardware: 0x00000000
Read register 'r6' (4 bytes) from hardware: 0x00000000
Read register 'r7' (4 bytes) from hardware: 0x00000000
Read register 'r8' (4 bytes) from hardware: 0x00000000
Read register 'r9' (4 bytes) from hardware: 0x00000000
Read register 'r10' (4 bytes) from hardware: 0x00000000
Read register 'r11' (4 bytes) from hardware: 0x00000000
Read register 'r12' (4 bytes) from hardware: 0x00000000
Read register 'sp' (4 bytes) from hardware: 0x00010000
Read register 'lr' (4 bytes) from hardware: 0xFFFFFFFF
Read register 'pc' (4 bytes) from hardware: 0x64150010
Read register 'xpsr' (4 bytes) from hardware: 0x00000001
Read 4 bytes @ address 0x10001564 (Data = 0x4685480D)
Read 2 bytes @ address 0x10001564 (Data = 0x480D)
Reading register 'msp' = 0x00000100
Reading register 'psp' = 0x00000000
Reading 64 bytes @ address 0x10001900
Read 2 bytes @ address 0x1000191A (Data = 0xF005)
Setting breakpoint @ address 0x1000191A, Kind = 2, Type = THUMB, BPHandle = 0x0001
Starting target CPU...
...Breakpoint (set by 'GDB') reached @ address 0x1000191A
Reading common registers: Read register 'r0' (4 bytes) from hardware: 0x00000210
Read register 'r1' (4 bytes) from hardware: 0x50060210
Read register 'r2' (4 bytes) from hardware: 0x481E0210
Read register 'r3' (4 bytes) from hardware: 0x25000010
Read register 'r4' (4 bytes) from hardware: 0x481E0210
Read register 'r5' (4 bytes) from hardware: 0x00000000
Read register 'r6' (4 bytes) from hardware: 0x00000000
Read register 'r7' (4 bytes) from hardware: 0x00000000
Read register 'r8' (4 bytes) from hardware: 0x00000000
Read register 'r9' (4 bytes) from hardware: 0x00000000
Read register 'r10' (4 bytes) from hardware: 0x00000000
Read register 'r11' (4 bytes) from hardware: 0x00000000
Read register 'r12' (4 bytes) from hardware: 0x00000000
Read register 'sp' (4 bytes) from hardware: 0xF8FF0310
Read register 'lr' (4 bytes) from hardware: 0x9B150010
Read register 'pc' (4 bytes) from hardware: 0x1A190010
Read register 'xpsr' (4 bytes) from hardware: 0x00000061
Removing breakpoint @ address 0x1000191A, Size = 2
Read 4 bytes @ address 0x1000191A (Data = 0xFD7FF005)

cubeIde DebuggerConsole

New UI allocated
GNU gdb (GNU Tools for STM32 13.3.rel1.20240926-1715) 14.2.90.20240526-git
Copyright (C) 2023 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.
Type "show copying" and "show warranty" for details.
This GDB was configured as "--host=x86_64-linux-gnu --target=arm-none-eabi".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<https://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
    <http://www.gnu.org/software/gdb/documentation/>.

For help, type "help".
Type "apropos word" to search for commands related to "word".
(gdb) 0x00000008 in g_pfnVectors ()

Temporary breakpoint 1, main ()
    at /home/user/repo/ceva_4dot0_needleless_stm32mp157c_m4_cmake/CM4/Core/Src/main.c:78
78        mainApp_preHalInit();
(gdb)                                                                                                                                                                                                                                   

[maxime-gaschet-devmg]

After a CONTINUE and a PAUSE

[haneefdm]

What you are doing may work but not how we do it. We use the command line version of JLink Server

"serverpath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.jlink.linux64_2.4.0.202501261557/tools/bin/JLinkGDBServer",

should be something like

"serverpath": "<path-to-server>/JLinkGDBServerCLExe",

See https://github.com/Marus/cortex-debug/wiki/J-Link-Specific-Configuration I am curious why you are using JLink from the ST's installation. We normally install JLink and use it from its install directory. Do you know what the difference is?

When I use Stm32CubeIde the debug is done correctly. On startup, the breakpoint on the main is correct and step-by-step works.
When I use VScode with cortex-debug, I can have a breakpoint on the startup.s but once I do a run or a step by step, the chip goes into hard fault (PC = 0x08).
Given that the 2 configurations use exactly the same tools, I wonder if the problem might be with the cortex-debug plugin?

In our deebug console, you can see the EXACT commands being sent. You can do the same with Stm32CubeIde, see what we are doing differently, and customize Cortex-Debug to do the equivalent.

We do not control the execution of your FW. We simply reset the chip and expect it to be halted at the reset vector. We do not have any finer control than that. Then we simply issue gdb commands to break, continue, step, etc. We only talk to gdb after the initial reset.

Are you sure you are loading the whole program (given your CPU is multi-core).

[mg-ceva]

Hello, thank you for your feedback.

What you are doing may work but not how we do it. We use the command line version of JLink Server
should be something like

"serverpath": "<path-to-server>/JLinkGDBServerCLExe",

Yes I tried but the result is the same. :-(

I am curious why you are using JLink from the ST's installation.

We want to use the tools provided by ST. I'm pretty sure the result would be the same even if I use the latest SEGGER tools. Furthermore, it's the same tools that works with cubeIde, so it should work with vsCode.

Are you sure you are loading the whole program (given your CPU is multi-core).

Yes, I have placed the chip in ENGINEERING mode, so the A7 core is supposed to hand over control to the M4. Additionally, I have added the verify download. So, it should be okay at this level.

Well, I think I'm going to give up with JLink.

So I turned to the ST-LINK V3 debugger and openOcd.
And... once again, under cubeIde with this debugger, it also works but not under VSCode. There is really something I am missing.

The launch.json configuration:

{
    "name": "debug-stlink",
    "cwd": "${workspaceRoot}",
    "executable": "./build/build-mg-aurora-ubuntu-vscode/sis2-needleless-m4.elf",
    "request": "launch",
    "type": "cortex-debug",
    "servertype": "openocd",
    "interface": "swd",
    "runToEntryPoint": "main",
    "showDevDebugOutput": "raw",
    "numberOfProcessors": 2,
    "targetProcessor": 0, // 0 = M4.
    "configFiles": ["cubeide_cmake debug-stlink-v3.cfg"],
    "searchDir": [
        "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.debug.openocd_2.3.100.202501240831/resources/openocd/st_scripts",
        "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mpu.debug.openocd_2.2.0.202409171044/resources/openocd/st_scripts"
    ],
    "serverArgs": [
        "-c", "gdb_report_data_abort enable"
    ]
}

I added in settings.json:
"cortex-debug.openocdPath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.openocd.linux64_2.4.100.202501161620/tools/bin/openocd"

The idea is still the same, to use the tools provided by cubeIde.

The gdb-server terminal under VSCode:

[2025-03-19T18:55:00.751Z] SERVER CONSOLE DEBUG: onBackendConnect: gdb-server session connected. You can switch to "DEBUG CONSOLE" to see GDB interactions.
/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.openocd.linux64_2.4.100.202501161620/tools/bin/openocd -c "gdb_port 50000" -c "tcl_port 50002" -c "telnet_port 50004" -s /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.debug.openocd_2.3.100.202501240831/resources/openocd/st_scripts -s /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mpu.debug.openocd_2.2.0.202409171044/resources/openocd/st_scripts -f /home/user/.vscode/extensions/marus25.cortex-debug-1.12.1/support/openocd-helpers.tcl -f "cubeide_cmake debug-stlink-v3.cfg" -c "gdb_report_data_abort enable"
Open On-Chip Debugger 0.12.0+dev-00608-gd8ed48fef (2025-02-06-11:15) [https://github.com/STMicroelectronics/OpenOCD]
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
CDLiveWatchSetup
Info : Listening on port 50002 for tcl connections
Info : Listening on port 50004 for telnet connections
Warn : 'srst_nogate' reset_config option is required
Info : STLINK V3J16M7B5S1 (API v3) VID:PID 0483:374F
Info : Target voltage: 3.253723
Info : clock speed 8000 kHz
Warn : 'srst_nogate' reset_config option is required
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Info : [STM32MP157CAAx.ap1] Examination succeed
Info : [STM32MP157CAAx.cm4] Cortex-M4 r0p1 processor detected
Info : [STM32MP157CAAx.cm4] target has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.ap2] Examination succeed
Info : [STM32MP157CAAx.axi] Examination succeed
Info : STM32MP157CAAx.cpu0: hardware has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.cpu0] Examination succeed
Info : STM32MP157CAAx.cpu1: hardware has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.cpu1] Examination succeed
Info : gdb port disabled
Info : gdb port disabled
Info : gdb port disabled
Info : starting gdb server for STM32MP157CAAx.cpu0 on 3334
Info : Listening on port 3334 for gdb connections
Info : starting gdb server for STM32MP157CAAx.cm4 on 3333
Info : Listening on port 3333 for gdb connections
shutdown command invoked
[2025-03-19T18:55:13.463Z] SERVER CONSOLE DEBUG: onBackendConnect: gdb-server session closed
GDB server session ended. This terminal will be reused, waiting for next session to start...

The debug console under VsCode :

Cortex-Debug: VSCode debugger extension version 1.12.1 git(652d042). Usage info: https://github.com/Marus/cortex-debug#usage
"configuration": {
    "name": "debug-stlink",
    "cwd": "/home/user/repo/sis2-needleless-m4",
    "executable": "/home/user/repo/sis2-needleless-m4/build/build-mg-aurora-ubuntu-vscode/sis2-needleless-m4.elf",
    "request": "launch",
    "type": "cortex-debug",
    "servertype": "openocd",
    "interface": "swd",
    "runToEntryPoint": "main",
    "showDevDebugOutput": "raw",
    "numberOfProcessors": 2,
    "configFiles": [
        "cubeide_cmake debug-stlink-v3.cfg"
    ],
    "searchDir": [
        "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.debug.openocd_2.3.100.202501240831/resources/openocd/st_scripts",
        "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mpu.debug.openocd_2.2.0.202409171044/resources/openocd/st_scripts"
    ],
    "serverArgs": [
        "-c",
        "gdb_report_data_abort enable"
    ],
    "__configurationTarget": 6,
    "gdbServerConsolePort": 55878,
    "pvtAvoidPorts": [],
    "chainedConfigurations": {
        "enabled": false
    },
    "debuggerArgs": [],
    "swoConfig": {
        "enabled": false,
        "decoders": [],
        "cpuFrequency": 0,
        "swoFrequency": 0,
        "source": "probe"
    },
    "rttConfig": {
        "enabled": false,
        "decoders": []
    },
    "graphConfig": [],
    "preLaunchCommands": [],
    "postLaunchCommands": [],
    "preAttachCommands": [],
    "postAttachCommands": [],
    "preRestartCommands": [],
    "postRestartCommands": [],
    "preResetCommands": [],
    "postResetCommands": [],
    "serverpath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.openocd.linux64_2.4.100.202501161620/tools/bin/openocd",
    "toolchainPath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/",
    "toolchainPrefix": "arm-none-eabi",
    "gdbPath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-gdb",
    "objdumpPath": "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-objdump",
    "extensionPath": "/home/user/.vscode/extensions/marus25.cortex-debug-1.12.1",
    "registerUseNaturalFormat": true,
    "variableUseNaturalFormat": true,
    "pvtVersion": "1.12.1",
    "__sessionId": "289db253-e08c-4f16-aa16-b3ff52e5bb87",
    "pvtShowDevDebugOutput": "raw"
}
Reading symbols from /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-objdump --syms -C -h -w /home/user/repo/sis2-needleless-m4/build/build-mg-aurora-ubuntu-vscode/sis2-needleless-m4.elf
Reading symbols from /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-nm --defined-only -S -l -C -p /home/user/repo/sis2-needleless-m4/build/build-mg-aurora-ubuntu-vscode/sis2-needleless-m4.elf
Launching GDB: /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/arm-none-eabi-gdb -q --interpreter=mi2
1-gdb-version
Launching gdb-server: /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.openocd.linux64_2.4.100.202501161620/tools/bin/openocd -c "gdb_port 50000" -c "tcl_port 50002" -c "telnet_port 50004" -s /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.debug.openocd_2.3.100.202501240831/resources/openocd/st_scripts -s /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mpu.debug.openocd_2.2.0.202409171044/resources/openocd/st_scripts -f /home/user/.vscode/extensions/marus25.cortex-debug-1.12.1/support/openocd-helpers.tcl -f "cubeide_cmake debug-stlink-v3.cfg" -c "gdb_report_data_abort enable"
    Please check TERMINAL tab (gdb-server) for output from /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.openocd.linux64_2.4.100.202501161620/tools/bin/openocd
Finished reading symbols from objdump: Time: 16 ms
Finished reading symbols from nm: Time: 33 ms
-> =thread-group-added,id="i1"
-> ~"GNU gdb (GNU Tools for STM32 13.3.rel1.20240926-1715) 14.2.90.20240526-git\n"
-> ~"Copyright (C) 2023 Free Software Foundation, Inc.\n"
-> ~"License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>\nThis is free software: you are free to change and redistribute it.\nThere is NO WARRANTY, to the extent permitted by law."
-> ~"\nType \"show copying\" and \"show warranty\" for details.\n"
-> ~"This GDB was configured as \"--host=x86_64-linux-gnu --target=arm-none-eabi\".\n"
-> ~"Type \"show configuration\" for configuration details.\n"
-> ~"For bug reporting instructions, please see:\n"
-> ~"<https://www.gnu.org/software/gdb/bugs/>.\n"
-> ~"Find the GDB manual and other documentation resources online at:\n    <"
-> ~"http://www.gnu.org/software/gdb/documentation/>.\n\n"
-> ~"For help, type \"help\".\n"
-> ~"Type \"apropos word\" to search for commands related to \"word\".\n"
-> 1^done
2-gdb-set mi-async on
-> 2^done
3-interpreter-exec console "set print demangle on"
-> 3^done
4-interpreter-exec console "set print asm-demangle on"
-> =cmd-param-changed,param="print asm-demangle",value="on"
-> 4^done
5-enable-pretty-printing
-> 5^done
6-interpreter-exec console "source /home/user/.vscode/extensions/marus25.cortex-debug-1.12.1/support/gdbsupport.init"
-> 6^done
7-interpreter-exec console "source /home/user/.vscode/extensions/marus25.cortex-debug-1.12.1/support/gdb-swo.init"
-> =cmd-param-changed,param="language",value="c"
-> =cmd-param-changed,param="language",value="auto"
-> 7^done
8-interpreter-exec console "set output-radix 0xa"
-> ~"Output radix now set to decimal 10, hex a, octal 12.\n"
Output radix now set to decimal 10, hex a, octal 12.
-> 8^done
9-interpreter-exec console "set input-radix 0xa"
-> ~"Input radix now set to decimal 10, hex a, octal 12.\n"
Input radix now set to decimal 10, hex a, octal 12.
-> 9^done
10-file-exec-and-symbols "/home/user/repo/sis2-needleless-m4/build/build-mg-aurora-ubuntu-vscode/sis2-needleless-m4.elf"
-> 10^done
11-target-select extended-remote localhost:50000
-> 11^error,msg="localhost:50000: Connection timed out."
12-interpreter-exec console "monitor reset halt"
Failed to launch GDB: localhost:50000: Connection timed out. (from target-select extended-remote localhost:50000)

On the cubeIde side, here is the console output (which ends with success):

Open On-Chip Debugger 0.12.0+dev-00608-gd8ed48fef (2025-02-06-11:15) [https://github.com/STMicroelectronics/OpenOCD]
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Warn : 'srst_nogate' reset_config option is required
Info : STLINK V3J16M7B5S1 (API v3) VID:PID 0483:374F
Info : Target voltage: 3.260106
Info : clock speed 8000 kHz
Warn : 'srst_nogate' reset_config option is required
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Info : [STM32MP157CAAx.ap1] Examination succeed
Info : [STM32MP157CAAx.cm4] Cortex-M4 r0p1 processor detected
Info : [STM32MP157CAAx.cm4] target has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.ap2] Examination succeed
Info : [STM32MP157CAAx.axi] Examination succeed
Info : STM32MP157CAAx.cpu0: hardware has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.cpu0] Examination succeed
Info : STM32MP157CAAx.cpu1: hardware has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.cpu1] Examination succeed
Info : gdb port disabled
Info : gdb port disabled
Info : gdb port disabled
Info : starting gdb server for STM32MP157CAAx.cpu0 on 3334
Info : Listening on port 3334 for gdb connections
Info : starting gdb server for STM32MP157CAAx.cm4 on 3333
Info : Listening on port 3333 for gdb connections
Info : accepting 'gdb' connection on tcp/3333
Warn : [STM32MP157CAAx.cm4] target was in unknown state when halt was requested
Info : New GDB Connection: 1, Target STM32MP157CAAx.cm4, state: halted
Info : accepting 'gdb' connection on tcp/3333
Info : New GDB Connection: 2, Target STM32MP157CAAx.cm4, state: halted

What I don't understand is that when it reaches
Info: Listening on port 3333 for gdb connections
in the case of cubeIde, we directly get:
Info: accepting 'gdb' connection on tcp/3333
whereas under VSCode, it times out...

Any idea?

[haneefdm]

Well, I think I'm going to give up with JLink.
The idea is still the same, to use the tools provided by cubeIde.

This is a good thing, especially for openocd. Didn't know ST was bundling JLink with ST. JLink releases are standard and they update much more frequently than ST does. In JLink case, I would prefer to use SEGGER releases (Also easier to find on filesystem). Also, in most cases, I prefer JLink to OpenOCD but that doesn't matter.

Something is wrong with OpenOCD here...we issued this command-line.

/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.openocd.linux64_2.4.100.202501161620/tools/bin/openocd -c "gdb_port 50000" -c "tcl_port 50002" -c "telnet_port 50004" -s /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.debug.openocd_2.3.100.202501240831/resources/openocd/st_scripts -s /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mpu.debug.openocd_2.2.0.202409171044/resources/openocd/st_scripts -f /home/user/.vscode/extensions/marus25.cortex-debug-1.12.1/support/openocd-helpers.tcl -f "cubeide_cmake debug-stlink-v3.cfg" -c "gdb_report_data_abort enable"

Pay special attention to -c "gdb_port 50000" -c "tcl_port 50002" -c "telnet_port 50004". We select these ports and ask OpenOCD to use them. We have been doing this since the beginning of this extension. Lets esamine the OpenOCD output

Info : Listening on port 50002 for tcl connections
Info : Listening on port 50004 for telnet connections

This is good. As expected so the command line options had an effect. And then, we see the following

Info : [STM32MP157CAAx.ap1] Examination succeed
Info : [STM32MP157CAAx.cm4] Cortex-M4 r0p1 processor detected
Info : [STM32MP157CAAx.cm4] target has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.ap2] Examination succeed
Info : [STM32MP157CAAx.axi] Examination succeed
Info : STM32MP157CAAx.cpu0: hardware has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.cpu0] Examination succeed
Info : STM32MP157CAAx.cpu1: hardware has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.cpu1] Examination succeed
Info : gdb port disabled
Info : gdb port disabled
Info : gdb port disabled

It disabled all gdb ports (there should be as many ports as there are processors). Are you sure there are two processors? It seems like you have three. Anyways, why are the ports getting disabled? Normally, right after processor discovery, you should see ports being used. Not disabled. But, it did the same thing for ST tools. Regardless, something undid the command line option we passed.

Info : starting gdb server for STM32MP157CAAx.cpu0 on 3334
Info : Listening on port 3334 for gdb connections
Info : starting gdb server for STM32MP157CAAx.cm4 on 3333
Info : Listening on port 3333 for gdb connections
Info : accepting 'gdb' connection on tcp/3333

It ignored our command line argument for gdb_port. It is possible that one of your config files did this.

-f "cubeide_cmake debug-stlink-v3.cfg"

Are you sure you are using the proper config files? On the STMCube side, I can't tell what the command line options were (you should be able to get this from the debug dialog box in Eclipse). Make sure you are using the right config files.

If you are using the right config file, then we have to debug that file to see why the ports are getting disabled and why the gdb_port option is getting overridden. This may be a bug in the config file provided by ST.

[haneefdm]

If you run a debug session even once in the ST IDE with openocd, it saves the config file alongside your project. I generally just use that and perhaps add/remove any redundant/harmful stuff. You (and ST) own this file btw and your whole debug experience is dependent on how OpenOCD is configured. We don't do any of that because it is very low-level HW/probe/processor/JTAG/ARM/SWD specific. I use the ST IDE as reference and then try to understand and do what they do. Cortex-Debug takes over TCP port management and setting up things like SWO/RTT (which includes TCP port management)

Given that the 2 configurations use exactly the same tools, I wonder if the problem might be with the cortex-debug plugin?

Tools yes. But how they are configured can make a big difference.

[mg-ceva]

Hello there,

Are you sure you are using the proper config files?

Yes I'm using the config file generated by cubeIde.

On the STMCube side, I can't tell what the command line options were

Here are the command line options used in cubeIde :

/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.openocd.linux64_2.4.100.202501161620/tools/bin/openocd "-f" "cubeide_cmake debug-stlink-v3.cfg" "-s" "/home/user/repo/sis2-needleless-m4" "-s" "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.debug.openocd_2.3.100.202501240831/resources/openocd/st_scripts" "-s" "/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mpu.debug.openocd_2.2.0.202409171044/resources/openocd/st_scripts" "-c" "gdb_report_data_abort enable" "-c" "gdb_port 3333" "-c" "tcl_port 6666" "-c" "telnet_port 4444"

They are the same as mine except for the port numbers.

If you are using the right config file, then we have to debug that file to see why the ports are getting disabled and why the gdb_port option is getting overridden.

Here is the file cubeide_cmake debug-stlink-v3.cfg :

# This is an genericBoard board with a single STM32MP157CAAx chip
#
# Generated by STM32CubeIDE
# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s)

source [find interface/stlink-dap.cfg]


set WORKAREASIZE 0x8000

transport select "dapdirect_swd"

set CHIPNAME STM32MP157CAAx
set BOARDNAME genericBoard

# Enable debug when in low power modes
set ENABLE_LOW_POWER 0

# Stop Watchdog counters when halt
set STOP_WATCHDOG 0

# STlink Debug clock frequency
set CLOCK_FREQ 8000

# Reset configuration
# use hardware reset, connect under reset
# connect_assert_srst needed if low power mode application running (WFI...)
reset_config srst_only srst_nogate connect_assert_srst
set CONNECT_UNDER_RESET 1
set CORE_RESET 0

# ACCESS PORT NUMBER
set AP_NUM 2
# GDB PORT
set GDB_PORT 3333

# BCTM CPU variables

source [find target/stm32mp1x.cfg]

I modified set GDB_PORT 3333 to set GDB_PORT 50000 and then it succeeded with the M4 connection. However I get the CPU goes into a hard fault, exactly the same way with JLINK configuration...

Here is the terminal output :

[2025-03-22T13:24:19.299Z] SERVER CONSOLE DEBUG: onBackendConnect: gdb-server session connected. You can switch to "DEBUG CONSOLE" to see GDB interactions.
/opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.externaltools.openocd.linux64_2.4.100.202501161620/tools/bin/openocd -c "gdb_port 50000" -c "tcl_port 50002" -c "telnet_port 50004" -s /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mcu.debug.openocd_2.3.100.202501240831/resources/openocd/st_scripts -s /opt/st/stm32cubeide_1.18.0/plugins/com.st.stm32cube.ide.mpu.debug.openocd_2.2.0.202409171044/resources/openocd/st_scripts -f /home/user/.vscode/extensions/marus25.cortex-debug-1.12.1/support/openocd-helpers.tcl -f "cubeide_cmake debug-stlink-v3.cfg" -c "gdb_report_data_abort enable"
Open On-Chip Debugger 0.12.0+dev-00608-gd8ed48fef (2025-02-06-11:15) [https://github.com/STMicroelectronics/OpenOCD]
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
CDLiveWatchSetup
Info : Listening on port 50002 for tcl connections
Info : Listening on port 50004 for telnet connections
Warn : 'srst_nogate' reset_config option is required
Info : STLINK V3J16M7B5S1 (API v3) VID:PID 0483:374F
Info : Target voltage: 3.265469
Info : clock speed 8000 kHz
Warn : 'srst_nogate' reset_config option is required
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Info : [STM32MP157CAAx.ap1] Examination succeed
Info : [STM32MP157CAAx.cm4] Cortex-M4 r0p1 processor detected
Info : [STM32MP157CAAx.cm4] target has 6 breakpoints, 4 watchpoints
Info : [STM32MP157CAAx.ap2] Examination succeed
Info : [STM32MP157CAAx.axi] Examination succeed
Info : STM32MP157CAAx.cpu0: hardware has 6 breakpoints, 4 watchpoints
Info : STM32MP157CAAx.cpu0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT
Info : [STM32MP157CAAx.cpu0] Examination succeed
Info : STM32MP157CAAx.cpu1: hardware has 6 breakpoints, 4 watchpoints
Info : STM32MP157CAAx.cpu1: MPIDR level2 0, cluster 0, core 1, multi core, no SMT
Info : [STM32MP157CAAx.cpu1] Examination succeed
Info : gdb port disabled
Info : gdb port disabled
Info : gdb port disabled
Info : starting gdb server for STM32MP157CAAx.cpu0 on 50001
Info : Listening on port 50001 for gdb connections
Info : starting gdb server for STM32MP157CAAx.cm4 on 50000
Info : Listening on port 50000 for gdb connections
Info : accepting 'gdb' connection on tcp/50000
Warn : [STM32MP157CAAx.cm4] target was in unknown state when halt was requested
Info : New GDB Connection: 1, Target STM32MP157CAAx.cm4, state: halted
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Info : Deferring arp_examine of STM32MP157CAAx.cm4
Info : Use arp_examine command to examine it manually!
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x6ba02477
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Warn : STM32MP157CAAx.cpu0: ran after reset and before halt ...
Warn : STM32MP157CAAx.cpu1: ran after reset and before halt ...
Info : [STM32MP157CAAx.cm4] Cortex-M4 r0p1 processor detected
Info : [STM32MP157CAAx.cm4] target has 6 breakpoints, 4 watchpoints
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0x800001f3 pc: 0x0000060e
MMU: disabled, D-Cache: disabled, I-Cache: enabled
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0x800001f3 pc: 0x0000567c
MMU: disabled, D-Cache: disabled, I-Cache: disabled
[STM32MP157CAAx.cm4] halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x00000008 msp: 0x00000100
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Info : Deferring arp_examine of STM32MP157CAAx.cm4
Info : Use arp_examine command to examine it manually!
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x6ba02477
Info : stlink_dap_op_connect(connect)
Warn : 'srst_nogate' reset_config option is required
Info : SWD DPIDR 0x6ba02477
Warn : STM32MP157CAAx.cpu0: ran after reset and before halt ...
Warn : STM32MP157CAAx.cpu1: ran after reset and before halt ...
Info : [STM32MP157CAAx.cm4] Cortex-M4 r0p1 processor detected
Info : [STM32MP157CAAx.cm4] target has 6 breakpoints, 4 watchpoints
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0x800001f3 pc: 0x0000060e
MMU: disabled, D-Cache: disabled, I-Cache: enabled
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0x800001f3 pc: 0x00009406
MMU: disabled, D-Cache: disabled, I-Cache: disabled
[STM32MP157CAAx.cm4] halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x00000008 msp: 0x00000100

Got strange warning : Warn : 'srst_nogate' reset_config option is required

[haneefdm]

set GDB_PORT 3333

You should comment that out. Do not reset it. Because, what we pass over the command line can change in some cases

About jlink, no idea what is going on. You have to do a similar thing as you did with OpenOCD to see if they are doing something that is missing with Cortex-Debug.

We cannot monitor every change every vendor does to every gdb-server. There is simply not enough resources for us to chase that. With JLink, you can pass an additional script to do customer stuff. Perhaps ST is doing that for this device

[haneefdm]

Btw, copy (and use) the openocd cfg file generated by ST to your own file name. Next time you use ST tools, it will be wiped out.

[stemschmidt]

The file cubeide_cmake debug-stlink-v3.cfg sources target/stm32mp1x.cfg. Could you please show the content of this file?

[mg-ceva]

@stemschmidt the file content is :

# This is an genericBoard board with a single STM32MP157CAAx chip
#
# Generated by STM32CubeIDE
# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s)

source [find interface/stlink-dap.cfg]


set WORKAREASIZE 0x8000

transport select "dapdirect_swd"

set CHIPNAME STM32MP157CAAx
set BOARDNAME genericBoard

# Enable debug when in low power modes
set ENABLE_LOW_POWER 1

# Stop Watchdog counters when halt
set STOP_WATCHDOG 1

# STlink Debug clock frequency
set CLOCK_FREQ 8000

# Reset configuration
# use hardware reset, connect under reset
# connect_assert_srst needed if low power mode application running (WFI...)
reset_config srst_only srst_nogate connect_assert_srst
set CONNECT_UNDER_RESET 1
set CORE_RESET 0

# ACCESS PORT NUMBER
set AP_NUM 2
# GDB PORT
set GDB_PORT 3333






# BCTM CPU variables

source [find target/stm32mp1x.cfg]

[stemschmidt]

Hi mg-ceva,
I meant the content of the file target/stm32mp1x.cfg :-)

Does the M4 Core have any access port protection which might lock the debug interface?

[mg-ceva]

Hello, the content of stm32mp1x.cfg is:

# STMicroelectronics STM32MP15x (Single/Dual Cortex-A7 plus Cortex-M4)
# http://www.st.com/stm32mp1

# HLA does not support multi-cores nor custom CSW nor AP other than 0
if { [using_hla] } {
	echo "ERROR: HLA transport cannot work with this target."
	echo "ERROR: To use STLink switch to DAP mode, as in \"board/stm32mp15x_dk2.cfg\"."
	shutdown
}

source [find target/swj-dp.tcl]
source [find mem_helper.tcl]
source [find gdb_helper.tcl]

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME stm32mp15x
}

if { [info exists CPUTAPID] } {
	set _CPUTAPID $CPUTAPID
} else {
	if { [using_jtag] } {
		set _CPUTAPID 0x6ba00477
	} else {
		set _CPUTAPID 0x6ba02477
	}
}

# Chip Level TAP Controller, only in jtag mode
if { [info exists CLCTAPID] } {
	set _CLCTAPID $CLCTAPID
} else {
	set _CLCTAPID 0x06500041
}

swj_newdap $_CHIPNAME tap -expected-id $_CPUTAPID -irlen 4
if { [using_jtag] } {
	jtag newtap $_CHIPNAME.clc tap -expected-id $_CLCTAPID -irlen 5
}

dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.tap -ignore-syspwrupack

# APNum definition
# set _AP_NUM_CM4 2
# set _AP_NUM_CA7 1
# set _AP_NUM_AXI 0

# FIXME: Cortex-M code requires target accessible during reset, but this is not possible in STM32MP1
# so defer-examine it until the reset framework get merged
# NOTE: keep ap-num and dbgbase to speed-up examine after reset
# NOTE: do not change the order of target create
target create $_CHIPNAME.ap1 mem_ap -dap $_CHIPNAME.dap -ap-num 1
target create $_CHIPNAME.ap2 mem_ap -dap $_CHIPNAME.dap -ap-num 2
target create $_CHIPNAME.axi mem_ap -dap $_CHIPNAME.dap -ap-num 0
target create $_CHIPNAME.cpu0 cortex_a -dap $_CHIPNAME.dap -ap-num 1 -coreid 0 -dbgbase 0xE00D0000
target create $_CHIPNAME.cpu1 cortex_a -dap $_CHIPNAME.dap -ap-num 1 -coreid 1 -dbgbase 0xE00D2000
target create $_CHIPNAME.cm4 cortex_m -dap $_CHIPNAME.dap -ap-num 2 -defer-examine -gdb-max-connections 2

swo  create $_CHIPNAME.swo  -dap $_CHIPNAME.dap -ap-num 1 -baseaddr 0xE0083000
tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 1 -baseaddr 0xE0093000

if { [info exists GDB_PORT] } {
	set _GDB_PORT $GDB_PORT
} else {
	set _GDB_PORT [ocd_gdb_port]
}

# Assigned gdb port to be used during target creation
# The two CA7 will require one or two gdb ports, depending on smp enabled or not
if { [info exists AP_NUM] } {
	if { $AP_NUM == 2 } {
		$_CHIPNAME.cm4 configure -gdb-port [expr {$_GDB_PORT + 0}]
		$_CHIPNAME.cpu0 configure -gdb-port [expr {$_GDB_PORT + 1}]
		$_CHIPNAME.cpu1 configure -gdb-port [expr {$_GDB_PORT + 2}]
	} else {
		$_CHIPNAME.cpu0 configure -gdb-port [expr {$_GDB_PORT + 0}]
		$_CHIPNAME.cpu1 configure -gdb-port [expr {$_GDB_PORT + 1}]
		$_CHIPNAME.cm4 configure -gdb-port [expr {$_GDB_PORT + 2}]
	}
}

targets $_CHIPNAME.cpu0

target smp $_CHIPNAME.cpu0 $_CHIPNAME.cpu1
$_CHIPNAME.cpu0 cortex_a maskisr on
$_CHIPNAME.cpu1 cortex_a maskisr on
$_CHIPNAME.cpu0 cortex_a dacrfixup on
$_CHIPNAME.cpu1 cortex_a dacrfixup on

cti create $_CHIPNAME.cti.sys  -dap $_CHIPNAME.dap -ap-num 1 -baseaddr 0xE0094000
cti create $_CHIPNAME.cti.cpu0 -dap $_CHIPNAME.dap -ap-num 1 -baseaddr 0xE00D8000
cti create $_CHIPNAME.cti.cpu1 -dap $_CHIPNAME.dap -ap-num 1 -baseaddr 0xE00D9000
cti create $_CHIPNAME.cti.cm4  -dap $_CHIPNAME.dap -ap-num 2 -baseaddr 0xE0043000

# interface does not work while srst is asserted
# this is target specific, valid for every board
# Errata "2.3.5 Incorrect reset of glitch-free kernel clock switch" requires
# srst to force VDDCORE power cycle or pull srst_core. Both cases reset the
# debug unit, behavior equivalent to "srst_pulls_trst"
reset_config srst_gates_jtag srst_pulls_trst

if { [info exists CLOCK_FREQ] } {
	set _CLOCK_FREQ $CLOCK_FREQ
} else {
	set _CLOCK_FREQ 5000
}
adapter speed $_CLOCK_FREQ
adapter srst pulse_width 200
# bootrom has an internal timeout of 1 second for detecting the boot flash.
# wait at least 1 second to guarantee we are out of bootrom
adapter srst delay 1100

$_CHIPNAME.cpu0 configure -event gdb-attach { gdb_attach_hook; halt }
$_CHIPNAME.cpu1 configure -event gdb-attach { gdb_attach_hook; halt }
$_CHIPNAME.cm4 configure -event gdb-attach { gdb_attach_hook; halt }

$_CHIPNAME.cpu0 configure -event gdb-detach { catch { resume }; gdb_detach_hook }
$_CHIPNAME.cpu1 configure -event gdb-detach { catch { resume }; gdb_detach_hook }
$_CHIPNAME.cm4 configure -event gdb-detach { if {[$::_CHIPNAME.cm4 curstate] == "halted"} {catch { resume }}; gdb_detach_hook }


add_help_text axi_secure "Set secure mode for following AXI accesses"
proc axi_secure {} {
	$::_CHIPNAME.dap apsel 0
	$::_CHIPNAME.dap apcsw 0x10006000
}

add_help_text axi_nsecure "Set non-secure mode for following AXI accesses"
proc axi_nsecure {} {
	$::_CHIPNAME.dap apsel 0
	$::_CHIPNAME.dap apcsw 0x30006000
}

axi_secure

proc dbgmcu_enable_debug {} {
	# set debug enable bits in DBGMCU_CR to get ap2 and cm4 visible
	catch {$::_CHIPNAME.ap1 mww 0xe0081004 0x00000007}
	# freeze watchdog 1 and 2 on cores halted
	catch {$::_CHIPNAME.ap1 mww 0xe008102c 0x00000004}
	catch {$::_CHIPNAME.ap1 mww 0xe008104c 0x00000008}
}

proc toggle_cpu0_dbg_claim0 {} {
	# toggle CPU0 DBG_CLAIM[0]
	$::_CHIPNAME.ap1 mww 0xe00d0fa0 1
	$::_CHIPNAME.ap1 mww 0xe00d0fa4 1
}

proc detect_cpu1 {} {
	set cpu1_prsr [$::_CHIPNAME.ap1 read_memory 0xE00D2314 32 1]
	set dual_core [expr {$cpu1_prsr & 1}]
	if {! $dual_core} {$::_CHIPNAME.cpu1 configure -defer-examine}
}

proc rcc_enable_traceclk {} {
	$::_CHIPNAME.ap2 mww 0x5000080c 0x301
}

# FIXME: most of handler below will be removed once reset framework get merged
$_CHIPNAME.ap1  configure -event reset-deassert-pre  {adapter deassert srst deassert trst;catch {dap init};catch {$::_CHIPNAME.dap apid 1}}
$_CHIPNAME.ap2  configure -event reset-deassert-pre  {dbgmcu_enable_debug;rcc_enable_traceclk}
$_CHIPNAME.cpu0 configure -event reset-deassert-pre  {$::_CHIPNAME.cpu0 arp_examine}
$_CHIPNAME.cpu1 configure -event reset-deassert-pre  {$::_CHIPNAME.cpu1 arp_examine allow-defer}
$_CHIPNAME.cpu0 configure -event reset-deassert-post {toggle_cpu0_dbg_claim0}
$_CHIPNAME.cm4  configure -event reset-deassert-post {$::_CHIPNAME.cm4 arp_examine;if {[$::_CHIPNAME.ap2 curstate] == "halted"} {$::_CHIPNAME.cm4 arp_halt}}
$_CHIPNAME.ap1  configure -event examine-start       {dap init}
$_CHIPNAME.ap2  configure -event examine-start       {dbgmcu_enable_debug}
$_CHIPNAME.cpu0 configure -event examine-end         {detect_cpu1}
$_CHIPNAME.ap2  configure -event examine-end         {rcc_enable_traceclk;$::_CHIPNAME.cm4 arp_examine; if {[$::_CHIPNAME.swo cget -traceclk]} {$::_CHIPNAME.swo enable} }

To answer your question, the chip in question is an STM32MP157C containing an M4 core and an A7 dual core. The M4 is slave to the A7, which is designed to run Linux. However, there is a mode called ENGINEERING mode, which should make it possible to dispense with loading by the A7. So, yes, I suspect there is a mechanism to debug the M4 core.

[stemschmidt]

I am pretty sure there is a mechanism to debug the M4 core :-)

My point is that there might be some special handling to enable debug access. In the file you posted I see axi_secure and dbgmcu_enable_debug which might point you to what you have to setup in order to access the debug port of the M4.

I do not know this chip but I think you have to enable the debug port to be able to access the internals of the M4 core. I assume that if the debug port is not enabled, a hardfault will be dispatched when you try to access anything within the M4 core.