Pinout and clock buffer

[omberge]

Pinout
I think I may have found an error in the constraints.xdc. When looking at the schematic it seems that the CS and the RWDS pins may be swapped. I think the correct pinout should be:

set_property PACKAGE_PIN C22 [get_ports io_hb_rwds_0]
set_property PACKAGE_PIN B23 [get_ports o_hb_cs_n_0]

Clk buffer
Perhaps adding a diff clock buffer in the hyperbus_phy_xilinx_usplus.sv is a better way to drive the clock?

replacing
OBUF u_obuf_ck_p (
.O ( o_hb_ck_p),
.I ( hb_ck_fwd_delayed)
);

assign o_hb_ck_n = 1'b0;

with this:

OBUFDS OBUFDS_inst (
.O(o_hb_ck_p), // 1-bit output: Diff_p output (connect directly to top-level port)
.OB(o_hb_ck_n), // 1-bit output: Diff_n output (connect directly to top-level port)
.I(hb_ck_fwd_delayed) // 1-bit input: Buffer input
);

and also changing the iostandard in the constraint.xdc:
set_property IOSTANDARD LVDS [get_ports o_hb_ck_n_0]
set_property IOSTANDARD LVDS [get_ports o_hb_ck_p_0]

best regards,
Olav