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PWGEM/Dilepton: reduce nbins (#7024)
1 parent 85058a9 commit dab4db2

4 files changed

Lines changed: 198 additions & 228 deletions

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‎PWGEM/Dilepton/Core/SingleTrackQC.h‎

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -101,8 +101,8 @@ struct SingleTrackQC {
101101
Configurable<float> cfg_max_chi2its{"cfg_max_chi2its", 5.0, "max chi2/NclsITS"};
102102
Configurable<float> cfg_max_dcaxy{"cfg_max_dcaxy", 1.0, "max dca XY for single track in cm"};
103103
Configurable<float> cfg_max_dcaz{"cfg_max_dcaz", 1.0, "max dca Z for single track in cm"};
104-
Configurable<bool> cfg_require_itsib_any{"cfg_require_itsib_any", true, "flag to require ITS ib any hits"};
105-
Configurable<bool> cfg_require_itsib_1st{"cfg_require_itsib_1st", false, "flag to require ITS ib 1st hit"};
104+
Configurable<bool> cfg_require_itsib_any{"cfg_require_itsib_any", false, "flag to require ITS ib any hits"};
105+
Configurable<bool> cfg_require_itsib_1st{"cfg_require_itsib_1st", true, "flag to require ITS ib 1st hit"};
106106

107107
Configurable<int> cfg_pid_scheme{"cfg_pid_scheme", static_cast<int>(DielectronCut::PIDSchemes::kTPChadrejORTOFreq), "pid scheme [kTOFreq : 0, kTPChadrej : 1, kTPChadrejORTOFreq : 2, kTPConly : 3]"};
108108
Configurable<float> cfg_min_TPCNsigmaEl{"cfg_min_TPCNsigmaEl", -2.0, "min. TPC n sigma for electron inclusion"};
@@ -176,17 +176,17 @@ struct SingleTrackQC {
176176
const AxisSpec axis_phi{36, 0.0, 2 * M_PI, "#varphi_{e} (rad.)"};
177177
const AxisSpec axis_pin{{0.00, 0.05, 0.06, 0.07, 0.08, 0.09, 0.10, 0.11, 0.12, 0.13, 0.14, 0.15, 0.16, 0.17, 0.18, 0.19, 0.20, 0.30, 0.40, 0.50, 0.60, 0.70, 0.80, 0.90, 1.00, 1.10, 1.20, 1.30, 1.40, 1.50, 1.60, 1.70, 1.80, 1.90, 2.00, 3.00, 4.00, 5.00, 6.00, 7.00, 8.00, 9.00, 10.00}, "p_{TPC inner wall} (GeV/c)"};
178178

179-
const AxisSpec axis_tpc_nsigma_el{100, -5.f, +5.f, "n #sigma_{e}^{TPC}"};
180-
const AxisSpec axis_tpc_nsigma_mu{100, -5.f, +5.f, "n #sigma_{#mu}^{TPC}"};
181-
const AxisSpec axis_tpc_nsigma_pi{100, -5.f, +5.f, "n #sigma_{#pi}^{TPC}"};
182-
const AxisSpec axis_tpc_nsigma_ka{100, -5.f, +5.f, "n #sigma_{K}^{TPC}"};
183-
const AxisSpec axis_tpc_nsigma_pr{100, -5.f, +5.f, "n #sigma_{p}^{TPC}"};
184-
185-
const AxisSpec axis_tof_nsigma_el{100, -5.f, +5.f, "n #sigma_{e}^{TOF}"};
186-
const AxisSpec axis_tof_nsigma_mu{100, -5.f, +5.f, "n #sigma_{#mu}^{TOF}"};
187-
const AxisSpec axis_tof_nsigma_pi{100, -5.f, +5.f, "n #sigma_{#pi}^{TOF}"};
188-
const AxisSpec axis_tof_nsigma_ka{100, -5.f, +5.f, "n #sigma_{K}^{TOF}"};
189-
const AxisSpec axis_tof_nsigma_pr{100, -5.f, +5.f, "n #sigma_{p}^{TOF}"};
179+
const AxisSpec axis_tpc_nsigma_el{80, -4.f, +4.f, "n #sigma_{e}^{TPC}"};
180+
const AxisSpec axis_tpc_nsigma_mu{80, -4.f, +4.f, "n #sigma_{#mu}^{TPC}"};
181+
const AxisSpec axis_tpc_nsigma_pi{80, -4.f, +4.f, "n #sigma_{#pi}^{TPC}"};
182+
const AxisSpec axis_tpc_nsigma_ka{80, -4.f, +4.f, "n #sigma_{K}^{TPC}"};
183+
const AxisSpec axis_tpc_nsigma_pr{80, -4.f, +4.f, "n #sigma_{p}^{TPC}"};
184+
185+
const AxisSpec axis_tof_nsigma_el{80, -4.f, +4.f, "n #sigma_{e}^{TOF}"};
186+
const AxisSpec axis_tof_nsigma_mu{80, -4.f, +4.f, "n #sigma_{#mu}^{TOF}"};
187+
const AxisSpec axis_tof_nsigma_pi{80, -4.f, +4.f, "n #sigma_{#pi}^{TOF}"};
188+
const AxisSpec axis_tof_nsigma_ka{80, -4.f, +4.f, "n #sigma_{K}^{TOF}"};
189+
const AxisSpec axis_tof_nsigma_pr{80, -4.f, +4.f, "n #sigma_{p}^{TOF}"};
190190

191191
// track info
192192
fRegistry.add("Track/positive/hs", "rec. single electron", kTHnSparseF, {axis_pt, axis_eta, axis_phi}, true);

‎PWGEM/Dilepton/Core/SingleTrackQCMC.h‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -102,8 +102,8 @@ struct SingleTrackQCMC {
102102
Configurable<float> cfg_max_chi2its{"cfg_max_chi2its", 5.0, "max chi2/NclsITS"};
103103
Configurable<float> cfg_max_dcaxy{"cfg_max_dcaxy", 1.0, "max dca XY for single track in cm"};
104104
Configurable<float> cfg_max_dcaz{"cfg_max_dcaz", 1.0, "max dca Z for single track in cm"};
105-
Configurable<bool> cfg_require_itsib_any{"cfg_require_itsib_any", true, "flag to require ITS ib any hits"};
106-
Configurable<bool> cfg_require_itsib_1st{"cfg_require_itsib_1st", false, "flag to require ITS ib 1st hit"};
105+
Configurable<bool> cfg_require_itsib_any{"cfg_require_itsib_any", false, "flag to require ITS ib any hits"};
106+
Configurable<bool> cfg_require_itsib_1st{"cfg_require_itsib_1st", true, "flag to require ITS ib 1st hit"};
107107

108108
Configurable<int> cfg_pid_scheme{"cfg_pid_scheme", static_cast<int>(DielectronCut::PIDSchemes::kTPChadrejORTOFreq), "pid scheme [kTOFreq : 0, kTPChadrej : 1, kTPChadrejORTOFreq : 2, kTPConly : 3]"};
109109
Configurable<float> cfg_min_TPCNsigmaEl{"cfg_min_TPCNsigmaEl", -2.0, "min. TPC n sigma for electron inclusion"};
@@ -118,7 +118,7 @@ struct SingleTrackQCMC {
118118
Configurable<float> cfg_max_TPCNsigmaPr{"cfg_max_TPCNsigmaPr", +3.0, "max. TPC n sigma for proton exclusion"};
119119
Configurable<float> cfg_min_TOFNsigmaEl{"cfg_min_TOFNsigmaEl", -3.0, "min. TOF n sigma for electron inclusion"};
120120
Configurable<float> cfg_max_TOFNsigmaEl{"cfg_max_TOFNsigmaEl", +3.0, "max. TOF n sigma for electron inclusion"};
121-
Configurable<bool> enableTTCA{"enableTTCA", true, "Flag to enable or disable TTCA"}; // TTCA should not be used for single track to avoid double counting.
121+
Configurable<bool> enableTTCA{"enableTTCA", false, "Flag to enable or disable TTCA"}; // TTCA should not be used for single track to avoid double counting.
122122

123123
// CCDB configuration for PID ML
124124
Configurable<std::string> BDTLocalPathGamma{"BDTLocalPathGamma", "pid_ml_xgboost.onnx", "Path to the local .onnx file"};
@@ -181,17 +181,17 @@ struct SingleTrackQCMC {
181181
const AxisSpec axis_charge_gen{3, -1.5, +1.5, "true charge"};
182182
const AxisSpec axis_pin{{0.00, 0.05, 0.06, 0.07, 0.08, 0.09, 0.10, 0.11, 0.12, 0.13, 0.14, 0.15, 0.16, 0.17, 0.18, 0.19, 0.20, 0.30, 0.40, 0.50, 0.60, 0.70, 0.80, 0.90, 1.00, 1.10, 1.20, 1.30, 1.40, 1.50, 1.60, 1.70, 1.80, 1.90, 2.00, 3.00, 4.00, 5.00, 6.00, 7.00, 8.00, 9.00, 10.00}, "p_{TPC inner wall} (GeV/c)"};
183183

184-
const AxisSpec axis_tpc_nsigma_el{100, -5.f, +5.f, "n #sigma_{e}^{TPC}"};
185-
const AxisSpec axis_tpc_nsigma_mu{100, -5.f, +5.f, "n #sigma_{#mu}^{TPC}"};
186-
const AxisSpec axis_tpc_nsigma_pi{100, -5.f, +5.f, "n #sigma_{#pi}^{TPC}"};
187-
const AxisSpec axis_tpc_nsigma_ka{100, -5.f, +5.f, "n #sigma_{K}^{TPC}"};
188-
const AxisSpec axis_tpc_nsigma_pr{100, -5.f, +5.f, "n #sigma_{p}^{TPC}"};
189-
190-
const AxisSpec axis_tof_nsigma_el{100, -5.f, +5.f, "n #sigma_{e}^{TOF}"};
191-
const AxisSpec axis_tof_nsigma_mu{100, -5.f, +5.f, "n #sigma_{#mu}^{TOF}"};
192-
const AxisSpec axis_tof_nsigma_pi{100, -5.f, +5.f, "n #sigma_{#pi}^{TOF}"};
193-
const AxisSpec axis_tof_nsigma_ka{100, -5.f, +5.f, "n #sigma_{K}^{TOF}"};
194-
const AxisSpec axis_tof_nsigma_pr{100, -5.f, +5.f, "n #sigma_{p}^{TOF}"};
184+
const AxisSpec axis_tpc_nsigma_el{80, -4.f, +4.f, "n #sigma_{e}^{TPC}"};
185+
const AxisSpec axis_tpc_nsigma_mu{80, -4.f, +4.f, "n #sigma_{#mu}^{TPC}"};
186+
const AxisSpec axis_tpc_nsigma_pi{80, -4.f, +4.f, "n #sigma_{#pi}^{TPC}"};
187+
const AxisSpec axis_tpc_nsigma_ka{80, -4.f, +4.f, "n #sigma_{K}^{TPC}"};
188+
const AxisSpec axis_tpc_nsigma_pr{80, -4.f, +4.f, "n #sigma_{p}^{TPC}"};
189+
190+
const AxisSpec axis_tof_nsigma_el{80, -4.f, +4.f, "n #sigma_{e}^{TOF}"};
191+
const AxisSpec axis_tof_nsigma_mu{80, -4.f, +4.f, "n #sigma_{#mu}^{TOF}"};
192+
const AxisSpec axis_tof_nsigma_pi{80, -4.f, +4.f, "n #sigma_{#pi}^{TOF}"};
193+
const AxisSpec axis_tof_nsigma_ka{80, -4.f, +4.f, "n #sigma_{K}^{TOF}"};
194+
const AxisSpec axis_tof_nsigma_pr{80, -4.f, +4.f, "n #sigma_{p}^{TOF}"};
195195

196196
// generated info
197197
fRegistry.add("Generated/lf/hs", "gen. single electron", kTHnSparseF, {axis_pt, axis_eta, axis_phi, axis_charge_gen}, true);

‎PWGEM/PhotonMeson/Tasks/pcmQC.cxx‎

Lines changed: 14 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -48,8 +48,8 @@ struct PCMQC {
4848
Configurable<float> cfgZvtxMax{"cfgZvtxMax", 10.f, "max. Zvtx"};
4949
Configurable<bool> cfgRequireSel8{"cfgRequireSel8", true, "require sel8 in event cut"};
5050
Configurable<bool> cfgRequireFT0AND{"cfgRequireFT0AND", true, "require FT0AND in event cut"};
51-
Configurable<bool> cfgRequireNoTFB{"cfgRequireNoTFB", false, "require No time frame border in event cut"};
52-
Configurable<bool> cfgRequireNoITSROFB{"cfgRequireNoITSROFB", false, "require no ITS readout frame border in event cut"};
51+
Configurable<bool> cfgRequireNoTFB{"cfgRequireNoTFB", true, "require No time frame border in event cut"};
52+
Configurable<bool> cfgRequireNoITSROFB{"cfgRequireNoITSROFB", true, "require no ITS readout frame border in event cut"};
5353
Configurable<bool> cfgRequireNoSameBunchPileup{"cfgRequireNoSameBunchPileup", false, "require no same bunch pileup in event cut"};
5454
Configurable<bool> cfgRequireVertexITSTPC{"cfgRequireVertexITSTPC", false, "require Vertex ITSTPC in event cut"}; // ITS-TPC matched track contributes PV.
5555
Configurable<bool> cfgRequireGoodZvtxFT0vsPV{"cfgRequireGoodZvtxFT0vsPV", false, "require good Zvtx between FT0 vs. PV in event cut"};
@@ -65,7 +65,7 @@ struct PCMQC {
6565
Configurable<bool> cfg_require_v0_with_tpconly{"cfg_require_v0_with_tpconly", false, "flag to select V0s with TPConly tracks"};
6666
Configurable<bool> cfg_require_v0_on_wwire_ib{"cfg_require_v0_on_wwire_ib", false, "flag to select V0s on W wires ITSib"};
6767
Configurable<float> cfg_min_pt_v0{"cfg_min_pt_v0", 0.1, "min pT for v0 photons at PV"};
68-
Configurable<float> cfg_max_eta_v0{"cfg_max_eta_v0", 0.9, "max eta for v0 photons at PV"};
68+
Configurable<float> cfg_max_eta_v0{"cfg_max_eta_v0", 0.8, "max eta for v0 photons at PV"};
6969
Configurable<float> cfg_min_v0radius{"cfg_min_v0radius", 4.0, "min v0 radius"};
7070
Configurable<float> cfg_max_v0radius{"cfg_max_v0radius", 90.0, "max v0 radius"};
7171
Configurable<float> cfg_max_alpha_ap{"cfg_max_alpha_ap", 0.95, "max alpha for AP cut"};
@@ -80,6 +80,7 @@ struct PCMQC {
8080
Configurable<float> cfg_max_chi2its{"cfg_max_chi2its", 5.0, "max chi2/NclsITS"};
8181
Configurable<float> cfg_min_TPCNsigmaEl{"cfg_min_TPCNsigmaEl", -3.0, "min. TPC n sigma for electron"};
8282
Configurable<float> cfg_max_TPCNsigmaEl{"cfg_max_TPCNsigmaEl", +3.0, "max. TPC n sigma for electron"};
83+
Configurable<bool> cfg_disable_itsonly_track{"cfg_disable_itsonly_track", false, "flag to disable ITSonly tracks"};
8384
} pcmcuts;
8485

8586
static constexpr std::string_view event_types[2] = {"before/", "after/"};
@@ -120,7 +121,7 @@ struct PCMQC {
120121

121122
// v0 info
122123
fRegistry.add("V0/hPt", "pT;p_{T,#gamma} (GeV/c)", kTH1F, {{2000, 0.0f, 20}}, false);
123-
fRegistry.add("V0/hEtaPhi", "#eta vs. #varphi;#varphi (rad.);#eta", kTH2F, {{180, 0, 2 * M_PI}, {40, -2.0f, 2.0f}}, false);
124+
fRegistry.add("V0/hEtaPhi", "#eta vs. #varphi;#varphi (rad.);#eta", kTH2F, {{36, 0, 2 * M_PI}, {20, -1.0f, 1.0f}}, false);
124125
fRegistry.add("V0/hRadius", "V0Radius; radius in Z (cm);radius in XY (cm)", kTH2F, {{200, -100, 100}, {200, 0.0f, 100.0f}}, false);
125126
fRegistry.add("V0/hCosPA", "V0CosPA;cosine pointing angle", kTH1F, {{100, 0.9f, 1.0f}}, false);
126127
fRegistry.add("V0/hCosPA_Rxy", "cos PA vs. R_{xy};R_{xy} (cm);cosine pointing angle", kTH2F, {{200, 0.f, 100.f}, {100, 0.9f, 1.0f}}, false);
@@ -196,6 +197,8 @@ struct PCMQC {
196197
fV0PhotonCut.SetChi2PerClusterTPC(0.0, pcmcuts.cfg_max_chi2tpc);
197198
fV0PhotonCut.SetTPCNsigmaElRange(pcmcuts.cfg_min_TPCNsigmaEl, pcmcuts.cfg_max_TPCNsigmaEl);
198199
fV0PhotonCut.SetChi2PerClusterITS(-1e+10, pcmcuts.cfg_max_chi2its);
200+
fV0PhotonCut.SetDisableITSonly(pcmcuts.cfg_disable_itsonly_track);
201+
199202
if (pcmcuts.cfg_reject_v0_on_itsib) {
200203
fV0PhotonCut.SetNClustersITS(2, 4);
201204
} else {
@@ -338,14 +341,14 @@ struct PCMQC {
338341
for (auto& v0 : v0photons_coll) {
339342
auto pos = v0.posTrack_as<aod::V0Legs>();
340343
auto ele = v0.negTrack_as<aod::V0Legs>();
341-
342-
if (fV0PhotonCut.IsSelected<aod::V0Legs>(v0)) {
343-
nv0++;
344-
fillV0Info(v0);
345-
for (auto& leg : {pos, ele}) {
346-
fillV0LegInfo(leg);
347-
}
344+
if (!fV0PhotonCut.IsSelected<aod::V0Legs>(v0)) {
345+
continue;
346+
}
347+
fillV0Info(v0);
348+
for (auto& leg : {pos, ele}) {
349+
fillV0LegInfo(leg);
348350
}
351+
nv0++;
349352
} // end of v0 loop
350353
fRegistry.fill(HIST("V0/hNgamma"), nv0);
351354
} // end of collision loop

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