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PWGUD: update with o2 linter fixes
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‎PWGUD/AQC/CMakeLists.txt‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ o2physics_add_dpl_workflow(udqcmidrap
2424
PUBLIC_LINK_LIBRARIES O2::Framework O2Physics::AnalysisCore O2Physics::DGCutparHolder
2525
COMPONENT_NAME Analysis)
2626

27-
o2physics_add_dpl_workflow(udqcmuon
28-
SOURCES udQCmidRap.cxx
27+
o2physics_add_dpl_workflow(ud-qc-muon
28+
SOURCES udQcMuon.cxx
2929
PUBLIC_LINK_LIBRARIES O2::Framework O2Physics::AnalysisCore O2Physics::DGCutparHolder
3030
COMPONENT_NAME Analysis)

‎PWGUD/AQC/udQCMuon.cxx‎

Lines changed: 55 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,13 @@
88
// In applying this license CERN does not waive the privileges and immunities
99
// granted to it by virtue of its status as an Intergovernmental Organization
1010
// or submit itself to any jurisdiction.
11-
///
11+
//
12+
/// \file udQcMuon.cxx
1213
/// \brief A task for Asynchronus Quality Control for Ultra-perimpheral and Diffraction (AQC-UD)
1314
/// \author Anisa Khatun, anisa.khatun@cern.ch
1415
/// \author Paul Buehler, paul.buehler@oeaw.ac.at
15-
/// \since 04.05.2023
16+
/// \author Sara Haidlova, sara.haidlova@cern.ch
17+
/// \since 28.09.2025
1618

1719
#include "PWGUD/Core/UDHelpers.h"
1820

@@ -32,25 +34,25 @@ using namespace o2;
3234
using namespace o2::framework;
3335
using namespace o2::framework::expressions;
3436

35-
struct UDQC {
37+
struct UdQcMuon {
3638

3739
SliceCache cache;
3840
Preslice<aod::Zdcs> perBCzdc = aod::zdc::bcId;
3941
Preslice<aod::Calos> perBCcalo = aod::calo::bcId;
4042

41-
static constexpr std::string_view hcFIT1s[5] = {"CleanFIT1/FV0A", "CleanFIT1/FT0A", "CleanFIT1/FT0C", "CleanFIT1/FDDA", "CleanFIT1/FDDC"};
42-
static constexpr std::string_view hcFIT2s[5] = {"CleanFIT2/FV0A", "CleanFIT2/FT0A", "CleanFIT2/FT0C", "CleanFIT2/FDDA", "CleanFIT2/FDDC"};
43-
static constexpr std::string_view hcRelBCs[5] = {"CleanFIT2/BCFV0A", "CleanFIT2/BCFT0A", "CleanFIT2/BCFT0C", "CleanFIT2/BCFDDA", "CleanFIT2/BCFDDC"};
43+
static constexpr std::string_view KhcFIT1s[5] = {"CleanFIT1/FV0A", "CleanFIT1/FT0A", "CleanFIT1/FT0C", "CleanFIT1/FDDA", "CleanFIT1/FDDC"};
44+
static constexpr std::string_view KhcFIT2s[5] = {"CleanFIT2/FV0A", "CleanFIT2/FT0A", "CleanFIT2/FT0C", "CleanFIT2/FDDA", "CleanFIT2/FDDC"};
45+
static constexpr std::string_view KhcRelBCs[5] = {"CleanFIT2/BCFV0A", "CleanFIT2/BCFT0A", "CleanFIT2/BCFT0C", "CleanFIT2/BCFDDA", "CleanFIT2/BCFDDC"};
4446

4547
// get a DGCutparHolder
4648
DGCutparHolder diffCuts = DGCutparHolder();
47-
Configurable<DGCutparHolder> DGCuts{"DGCuts", {}, "DG event cuts"};
48-
Configurable<bool> withAmbTrackAnalysis{"ambiguousTracks", false, "with ambiguous tracks analysis"};
49-
Configurable<bool> withAmbFwdTrackAnalysis{"ambiguousFwdTracks", false, "with ambiguous forward tracks analysis"};
49+
Configurable<DGCutparHolder> dgCuts{"dgCuts", {}, "DG event cuts"};
50+
Configurable<bool> withAmbTrackAnalysis{"withAmbTrackAnalysis", false, "with ambiguous tracks analysis"};
51+
Configurable<bool> withAmbFwdTrackAnalysis{"withAmbFwdTrackAnalysis", false, "with ambiguous forward tracks analysis"};
5052
Configurable<bool> doCleanFITBC{"doCleanFITBC", false, "Require cleanFIT in compatible BCs"};
5153
Configurable<float> rapCut{"rapCut", 0.9f, "choose event in midrapidity"};
5254
Configurable<int> itsNClsCut{"itsNClsCut", 4, "minimal number of ITS clusters"};
53-
Configurable<int> itsChi2NCls{"itsChi2NClsCut", 36, "minimal Chi2/cluster for the ITS track"};
55+
Configurable<int> itsChi2NCls{"itsChi2NCls", 36, "minimal Chi2/cluster for the ITS track"};
5456
Configurable<int> tpcNClsCrossedRowsCut{"tpcNClsCrossedRowsCut", 70, "minimal number of crossed TPC rows"};
5557
Configurable<int> tpcChi2NCls{"tpcChi2NCls", 4, "minimal Chi2/cluster for the TPC track"};
5658
Configurable<float> tpcMinNCls{"tpcMinNCls", 3, "minimum number of TPC clusters"};
@@ -77,10 +79,7 @@ struct UDQC {
7779

7880
void init(InitContext& context)
7981
{
80-
// initialize global variables - smazat
81-
// maxdEdxTPC = 0.;
82-
// maxdEdxTOF = 0.;
83-
diffCuts = (DGCutparHolder)DGCuts;
82+
diffCuts = (DGCutparHolder)dgCuts;
8483

8584
// add histograms for the different process functions
8685
if (context.mOptions.get<bool>("processMain")) {
@@ -150,8 +149,10 @@ struct UDQC {
150149
registry.add("CleanFIT1/cF1FDDAamp", "#cF1FDDAamp", {HistType::kTH2F, {{20, -0.5, 19.5}, {1000, -0.5, 999.5}}});
151150
registry.add("CleanFIT1/cF1FDDCamp", "#cF1FDDCamp", {HistType::kTH2F, {{20, -0.5, 19.5}, {1000, -0.5, 999.5}}});
152151

153-
for (auto n{0}; n < 5; n++) {
154-
registry.add(hcFIT1s[n].data(), hcFIT1s[n].data(), {HistType::kTH2F, {{20, -0.5, 19.5}, {2, -0.5, 1.5}}});
152+
constexpr int N = static_cast<int>(std::size(KhcFIT1s));
153+
154+
for (auto n{0}; n < N; n++) {
155+
registry.add(KhcFIT1s[n].data(), KhcFIT1s[n].data(), {HistType::kTH2F, {{20, -0.5, 19.5}, {2, -0.5, 1.5}}});
155156
}
156157
}
157158
if (context.mOptions.get<bool>("processCleanFIT2")) {
@@ -162,9 +163,10 @@ struct UDQC {
162163
registry.add("CleanFIT2/cF2FDDAamp", "#cF2FDDAamp", {HistType::kTH2F, {{20, -0.5, 19.5}, {1000, -0.5, 999.5}}});
163164
registry.add("CleanFIT2/cF2FDDCamp", "#cF2FDDCamp", {HistType::kTH2F, {{20, -0.5, 19.5}, {1000, -0.5, 999.5}}});
164165

165-
for (auto n{0}; n < 5; n++) {
166-
registry.add(hcFIT2s[n].data(), hcFIT2s[n].data(), {HistType::kTH2F, {{20, -0.5, 19.5}, {2, -0.5, 1.5}}});
167-
registry.add(hcRelBCs[n].data(), hcRelBCs[n].data(), {HistType::kTH1F, {{3564, -0.5, 3563.5}}});
166+
constexpr int N_t = static_cast<int>(std::size(KhcFIT2s));
167+
for (auto n{0}; n < N_t; n++) {
168+
registry.add(KhcFIT2s[n].data(), KhcFIT2s[n].data(), {HistType::kTH2F, {{20, -0.5, 19.5}, {2, -0.5, 1.5}}});
169+
registry.add(KhcRelBCs[n].data(), KhcRelBCs[n].data(), {HistType::kTH1F, {{3564, -0.5, 3563.5}}});
168170
}
169171
}
170172
if (context.mOptions.get<bool>("processFV0")) {
@@ -258,18 +260,9 @@ struct UDQC {
258260
// update dEdx histograms
259261
registry.get<TH2>(HIST("tracks/dEdxTPC"))->Fill(track.tpcInnerParam() / track.sign(), track.tpcSignal());
260262

261-
/*if (track.tpcSignal() > maxdEdxTPC) {
262-
maxdEdxTPC = track.tpcSignal();
263-
// LOGF(debug, "<UDQC> New maxdEdx TPC %f", maxdEdxTPC);
264-
}smazat*/
265-
266263
// TOF hit?
267264
if (track.hasTOF()) {
268265
registry.get<TH2>(HIST("tracks/dEdxTOF"))->Fill(track.p() / track.sign(), track.beta());
269-
/* if (track.tofSignal() > maxdEdxTOF) {
270-
maxdEdxTOF = track.tofSignal();
271-
// LOGF(debug, "<UDQC> New maxdEdx TOF %f", maxdEdxTOF);
272-
}smazat*/
273266

274267
// No vertex track with TOF hit?
275268
if (!track.isPVContributor()) {
@@ -460,7 +453,8 @@ struct UDQC {
460453

461454
float massMu = o2::constants::physics::MassMuonMinus;
462455
// DGcandidates with 2 good tracks -> to be optimised for different number of candidates
463-
if (isDGcandidate && countGT == 2) {
456+
int tG = 2;
457+
if (isDGcandidate && countGT == tG) {
464458

465459
auto trkDaughter1 = tracks.iteratorAt(trkIdx[0]);
466460
auto trkDaughter2 = tracks.iteratorAt(trkIdx[1]);
@@ -545,7 +539,7 @@ struct UDQC {
545539
}
546540
}
547541
}
548-
PROCESS_SWITCH(UDQC, processMain, "Process Main", true);
542+
PROCESS_SWITCH(UdQcMuon, processMain, "Process Main", true);
549543

550544
// ...............................................................................................................
551545
// Distribution of number of PV contributors for all collisions and those with empty FT0
@@ -566,7 +560,7 @@ struct UDQC {
566560
registry.get<TH1>(HIST("fpPVC"))->Fill(collision.numContrib(), 1.);
567561
}
568562
}
569-
PROCESS_SWITCH(UDQC, processFewProng, "Process FewProng", true);
563+
PROCESS_SWITCH(UdQcMuon, processFewProng, "Process FewProng", true);
570564

571565
// .............................................................................................................................................
572566
void processCleanFIT1(CC const& collision, BCs const& bct0s,
@@ -576,9 +570,10 @@ struct UDQC {
576570

577571
// test influence of BCrange width using a series of NDtcoll
578572
float ampFV0A, ampFT0A, ampFT0C, ampFDDA, ampFDDC;
579-
auto FITlims = std::vector<float>(5, 1000000.);
573+
auto fitLims = std::vector<float>(5, 1000000.);
580574
bool isDGcandidate = true;
581-
for (int NDtcoll = 0; NDtcoll < 20; NDtcoll++) {
575+
int maxNDtcoll = 20;
576+
for (int NDtcoll = 0; NDtcoll < maxNDtcoll; NDtcoll++) {
582577
auto bcSlice = udhelpers::compatibleBCs(collision, NDtcoll, bct0s, 0);
583578

584579
// do for diffCuts.FITAmpLimits
@@ -610,19 +605,19 @@ struct UDQC {
610605

611606
// loop over single detectors
612607
static_for<0, 4>([&](auto n) {
613-
FITlims[n] = 0.;
608+
fitLims[n] = 0.;
614609
isDGcandidate = true;
615610
for (auto const& bc : bcSlice) {
616-
isDGcandidate &= udhelpers::cleanFIT(bc, diffCuts.maxFITtime(), FITlims);
611+
isDGcandidate &= udhelpers::cleanFIT(bc, diffCuts.maxFITtime(), fitLims);
617612
}
618-
constexpr int index = n.value;
619-
registry.fill(HIST(hcFIT1s[index]), NDtcoll, isDGcandidate * 1.);
620-
FITlims[n] = 1000000.;
613+
constexpr int Index = n.value;
614+
registry.fill(HIST(KhcFIT1s[Index]), NDtcoll, isDGcandidate * 1.);
615+
fitLims[n] = 1000000.;
621616
});
622617
}
623618
}
624619

625-
PROCESS_SWITCH(UDQC, processCleanFIT1, "Process CleanFitTest1", true);
620+
PROCESS_SWITCH(UdQcMuon, processCleanFIT1, "Process CleanFitTest1", true);
626621
// .............................................................................................................................................
627622

628623
void processCleanFIT2(CC const& collision, BCs const& bct0s,
@@ -636,9 +631,10 @@ struct UDQC {
636631
}
637632
// test influence of BCrange width using a series of nMinBC
638633
float ampFV0A, ampFT0A, ampFT0C, ampFDDA, ampFDDC;
639-
auto FITlims = std::vector<float>(5, 1000000.);
634+
auto fitLims = std::vector<float>(5, 1000000.);
640635
bool isDGcandidate = true;
641-
for (int nMinBC = 0; nMinBC < 20; nMinBC++) {
636+
int nMaxBC = 20;
637+
for (int nMinBC = 0; nMinBC < nMaxBC; nMinBC++) {
642638
auto bcSlice = udhelpers::compatibleBCs(collision, 0, bct0s, nMinBC);
643639
ampFV0A = ampFT0A = ampFT0C = ampFDDA = ampFDDC = 0.;
644640
isDGcandidate = true;
@@ -669,20 +665,20 @@ struct UDQC {
669665

670666
// loop over single detectors
671667
static_for<0, 4>([&](auto n) {
672-
FITlims[n] = 0.;
668+
fitLims[n] = 0.;
673669
isDGcandidate = true;
674670
for (auto const& bc : bcSlice) {
675-
isDGcandidate &= udhelpers::cleanFIT(bc, diffCuts.maxFITtime(), FITlims); // DG
671+
isDGcandidate &= udhelpers::cleanFIT(bc, diffCuts.maxFITtime(), fitLims); // DG
676672
}
677-
constexpr int index = n.value;
678-
registry.fill(HIST(hcFIT2s[index]), nMinBC, isDGcandidate * 1.);
679-
registry.fill(HIST(hcRelBCs[index]), static_cast<float>(bcnum), isDGcandidate * 1.);
680-
FITlims[n] = 1000000.;
673+
constexpr int Index = n.value;
674+
registry.fill(HIST(KhcFIT2s[Index]), nMinBC, isDGcandidate * 1.);
675+
registry.fill(HIST(KhcRelBCs[Index]), static_cast<float>(bcnum), isDGcandidate * 1.);
676+
fitLims[n] = 1000000.;
681677
});
682678
}
683679
}
684680

685-
PROCESS_SWITCH(UDQC, processCleanFIT2, "Process CleanFitTest2", true);
681+
PROCESS_SWITCH(UdQcMuon, processCleanFIT2, "Process CleanFitTest2", true);
686682

687683
// ...............................................................................................................
688684
void processFV0(aod::FV0As const& fv0s, BCs const&)
@@ -692,15 +688,15 @@ struct UDQC {
692688
return;
693689
}
694690

695-
for (auto fv0 : fv0s) {
691+
for (auto const& fv0 : fv0s) {
696692
registry.get<TH1>(HIST("FV0/hV0A"))->Fill(fv0.time());
697693
// side A
698694
for (size_t ind = 0; ind < fv0.channel().size(); ind++) {
699695
registry.get<TH2>(HIST("FV0/FV0A"))->Fill((fv0.channel())[ind], (fv0.amplitude())[ind]);
700696
}
701697
}
702698
};
703-
PROCESS_SWITCH(UDQC, processFV0, "Process FV0", true);
699+
PROCESS_SWITCH(UdQcMuon, processFV0, "Process FV0", true);
704700

705701
// ...............................................................................................................
706702
void processFT0(aod::FT0s const& ft0s, aod::FT0sCorrected const& ft0scorr, BCs const&)
@@ -719,7 +715,7 @@ struct UDQC {
719715
registry.get<TH1>(HIST("FT0/hT0AC"))->Fill(collision.t0AC());
720716
}
721717
}
722-
for (auto ft0 : ft0s) {
718+
for (auto const& ft0 : ft0s) {
723719
registry.get<TH1>(HIST("FT0/hT0A"))->Fill(ft0.timeA());
724720
registry.get<TH1>(HIST("FT0/hT0C"))->Fill(ft0.timeC());
725721

@@ -734,29 +730,30 @@ struct UDQC {
734730
}
735731
}
736732
};
737-
PROCESS_SWITCH(UDQC, processFT0, "Process FT0", true);
733+
PROCESS_SWITCH(UdQcMuon, processFT0, "Process FT0", true);
738734

739735
// ...............................................................................................................
740736
void processFDD(aod::FDDs const& fdds, BCs const&)
741737
{
742738
// LOGF(debug, "<FDDSignals> %d", fdds.size());
743739

744-
for (auto fdd : fdds) {
740+
for (auto const& fdd : fdds) {
745741

746742
registry.get<TH1>(HIST("FDD/hFDDA"))->Fill(fdd.timeA());
747743
registry.get<TH1>(HIST("FDD/hFDDC"))->Fill(fdd.timeC());
748744
// side A
749-
for (auto ind = 0; ind < 8; ind++) {
745+
int maxInd = 8;
746+
for (auto ind = 0; ind < maxInd; ind++) {
750747
registry.get<TH2>(HIST("FDD/FDDA"))->Fill(ind, (fdd.chargeA())[ind]);
751748
}
752749

753750
// side C
754-
for (auto ind = 0; ind < 8; ind++) {
751+
for (auto ind = 0; ind < maxInd; ind++) {
755752
registry.get<TH2>(HIST("FDD/FDDC"))->Fill(ind, (fdd.chargeC())[ind]);
756753
}
757754
}
758755
};
759-
PROCESS_SWITCH(UDQC, processFDD, "Process FDD", true);
756+
PROCESS_SWITCH(UdQcMuon, processFDD, "Process FDD", true);
760757

761758
// ...............................................................................................................
762759
void processZDC(aod::Zdc const& zdc)
@@ -787,12 +784,12 @@ struct UDQC {
787784
registry.get<TH2>(HIST("ZdcEnergies"))->Fill(20., (zdc.energySectorZPC())[2]);
788785
registry.get<TH2>(HIST("ZdcEnergies"))->Fill(21., (zdc.energySectorZPC())[3]);
789786
};
790-
PROCESS_SWITCH(UDQC, processZDC, "Process ZDC", true);
787+
PROCESS_SWITCH(UdQcMuon, processZDC, "Process ZDC", true);
791788
};
792789

793790
WorkflowSpec defineDataProcessing(ConfigContext const& cfgc)
794791
{
795792
return WorkflowSpec{
796-
adaptAnalysisTask<UDQC>(cfgc, TaskName{"udQCMuon"}),
793+
adaptAnalysisTask<UdQcMuon>(cfgc),
797794
};
798795
}

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