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ALICE3-TRK: setting basis for digitization code - definition of a simple segmentation, adding methods to deal with the curved VD layers, adding chip response based on ITS2 and ITS3 codes, adding useful codes for parameters, digit containers, etc.
// Copyright 2019-2020 CERN and copyright holders of ALICE O2.
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// See https://alice-o2.web.cern.ch/copyright for details of the copyright holders.
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// All rights not expressly granted are reserved.
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//
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// This software is distributed under the terms of the GNU General Public
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// License v3 (GPL Version 3), copied verbatim in the file "COPYING".
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//
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// In applying this license CERN does not waive the privileges and immunities
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// granted to it by virtue of its status as an Intergovernmental Organization
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// or submit itself to any jurisdiction.
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/// \file Specs.h
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/// \brief specs of the ALICE3 TRK
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#ifndef O2_ALICE_TRK_SPECS
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#defineO2_ALICE_TRK_SPECS
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#include<array>
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#include<math.h>
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// This is a temporary version with the specs for the ALICE3 TRK
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// This files defines the design specifications of the chips for VD, ML, OT.
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// Each TGeoShape has the following properties
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// length: dimension in z-axis
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// width: dimension in xy-axes
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// color: for visulisation
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namespaceo2::trk::constants
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{
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// Default unit of TGeo = cm
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constexprdouble cm{1};
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constexprdouble mu{1e-4};
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constexprdouble mm{1e-1};
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// namespace metalstack /// still to be defined
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// {
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// constexpr double thickness{5 * mu}; // physical thickness of the copper metal stack
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// }
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namespaceVD// TODO: add a primitive segmentation with more granularity wrt 1/4 layer = 1 chip
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{
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namespacepetal
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{
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constexprint nLayers{3}; // number of layers in each VD petal
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constexprint nDisks{6}; // number of disks in each VD petal
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namespacelayer
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{
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constexprdouble pitchX{10 * mu}; // pitch of the row
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constexprdouble pitchZ{10 * mu}; // pitch of the column
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constexprdouble totalThickness{30 * mu}; // total thickness of the chip
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constexpr std::array<double, nLayers> radii{0.5 * cm, 1.2 * cm, 2.5 * cm}; // width of the quarter of layer in cm
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constexpr std::array<double, nLayers> width{radii[0] * 2 * M_PI / 4, radii[1] * 2 * M_PI / 4, radii[2] * 2 * M_PI / 4}; // width of the quarter of layer in cm
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constexprdouble length{50 * cm}; // length of the layer
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constexprint nCols{static_cast<int>(length / pitchZ)}; // number of columns in the chip
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constexpr std::array<int, nLayers> nRows{static_cast<int>(width[0] / pitchX), static_cast<int>(width[1] / pitchX), static_cast<int>(width[2] / pitchX)}; // number of rows in the chip
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} // namespace layer
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namespacedisk
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{ //// TODO: to be filled
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constexprdouble radiusIn{0.5 * cm};
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constexprdouble radiusOut{2.5 * cm};
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} // namespace disk
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} // namespace petal
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} // namespace VD
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namespacemoduleMLOT/// same for ML and OT for the moment
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{ /// TODO: account for different modules in case of change
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namespacechip
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{
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constexprdouble width{25 * mm}; // width of the chip
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constexprdouble length{32 * mm}; // length of the chip
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constexprdouble pitchX{50 * mu}; // pitch of the row
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constexprdouble pitchZ{50 * mu}; // pitch of the column
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constexprint nRows{static_cast<int>(width / pitchX)}; // number of columns in the chip
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constexprint nCold{static_cast<int>(length / pitchZ)}; // number of rows in the chipù
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constexprdouble totalThickness{100 * mu}; // total thickness of the chip
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/// Set to 0 for the moment, to be adjusted with the actual design of the chip if needed
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staticconstexprfloat PassiveEdgeReadOut = 0.f; // width of the readout edge (Passive bottom)
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staticconstexprfloat PassiveEdgeTop = 0.f; // Passive area on top
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staticconstexprfloat PassiveEdgeSide = 0.f; // width of Passive area on left/right of the sensor
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} // namespace chip
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namespacegaps
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{
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constexprdouble interChips{0.2 * mm}; // gap between the chips
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constexprdouble outerEdgeLongSide{1 * mm}; // gap between the chips and the outer edges (long side)
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constexprdouble outerEdgeShortSide{0.1 * mm}; // gap between the chips and the outer edges (short side)
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} // namespace gaps
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constexprdouble width{chip::width * 2 + gaps::interChips + 2 * gaps::outerEdgeLongSide}; // width of the module
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constexprdouble length{chip::length * 4 + 3 * gaps::interChips + 2 * gaps::outerEdgeShortSide}; // length of the module
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constexprint nRows{static_cast<int>(width / chip::pitchX)}; // number of columns in the module
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constexprint nCold{static_cast<int>(length / chip::pitchZ)}; // number of rows in the module
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} // namespace moduleMLOT
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namespaceML
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{
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constexprdouble width{constants::moduleMLOT::width * 1}; // width of the stave
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constexprdouble length{constants::moduleMLOT::length * 10}; // length of the stave
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constexprint nRows{static_cast<int>(width / constants::moduleMLOT::chip::pitchX)}; // number of rows in the stave
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constexprint nCols{static_cast<int>(length / constants::moduleMLOT::chip::pitchZ)}; // number of columns in the stave
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} // namespace ML
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namespaceOT
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{
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constexprdouble width{moduleMLOT::width * 2}; // width of the stave
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constexprdouble length{moduleMLOT::length * 20}; // length of the stave
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constexprint nRows{static_cast<int>(width / moduleMLOT::chip::pitchX)}; // number of rows in the stave
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constexprint nCols{static_cast<int>(length / moduleMLOT::chip::pitchZ)}; // number of columns in the stave
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} // namespace OT
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namespacesilicon
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{
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constexprdouble thickness{10 * mu}; // thickness of active material
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