$2007 extra write test

[L10N37]

Just wondering about the $2007 extra write test.
both Mesen and Nintendulator both fail this.
I have had to hack up my $2007 write handler, and even track RMW opcodes to get this to pass. It doesn't seem right.

my RMW handlers already already do a dummy write, then another write after with the modified value.

A bit stumped on this.

[100thCoin]

If I recall, Sour has specifically told me they're not interested in emulating this behavior in Mesen.
This test is known to consistently fail on some consoles, inconsistently fail on others (due to the cpu/ppu clock alignments, or just analogue behavior quirks), and consistently pass on others. I'll admit, it's one of the tests I've heavily considered removing from this ROM, despite always passing on the console I own.

When reading/writing to $2007, there are incredibly short delays between the PPU reading/writing VRAM and the v register being incremented. This is noticeable in blargg's fullPalette.nes test rom. Which tells me that there is some series of events happening on different ppu cycles after a read or write occurs, and interrupting this series of events with another read/write is what causes the issues.

From what I recall, the PPU's 14-bit address bus re-uses the lower 8 bits as the PPU's data bus. By performing consecutive read/write CPU cycles on address $2007, the 14-bit address bus is simultaneously being used as the address bus and data bus, which is what results in the write to the PPU's address space where the lower 8 bits are the same value as what gets written. At least, that's my current understanding of the situation.

Truth be told, I had to do some incredibly hacky stuff for my own emulator to emulate this behavior, and more research is probably needed.

[L10N37]

ah cool. all good. Well, I'll just leave it as is for now. It won't hurt anything.

Just for your 'reset flag', I'm not so sure that actually exists.

I used this information to pass the reset flag test.

"Writes to the following registers are ignored if earlier than ~29658 CPU clocks after reset: PPUCTRL, PPUMASK, PPUSCROLL, PPUADDR. This also means that the PPUSCROLL/PPUADDR latch will not toggle. The other registers work immediately: PPUSTATUS, OAMADDR, OAMDATA ($2004), PPUDATA, and OAMDMA ($4014). "

https://www.nesdev.org/wiki/PPU_power_up_state